linux-kernel - RE: [tip:x86/asm] x86/entry/64: Add two more instruction suffixes

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Date:   Tue, 3 Jul 2018 10:29:36 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Jan Beulich' <JBeulich@...e.com>
CC:     Borislav Petkov <bp@...en8.de>,
        "brgerst@...il.com" <brgerst@...il.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Andrew Lutomirski <luto@...nel.org>,
        Ingo Molnar <mingo@...nel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Denys Vlasenko <dvlasenk@...hat.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-tip-commits@...r.kernel.org" 
        <linux-tip-commits@...r.kernel.org>,
        "hpa@...or.com" <hpa@...or.com>
Subject: RE: [tip:x86/asm] x86/entry/64: Add two more instruction suffixes

From: Jan Beulich
> Sent: 03 July 2018 11:07
> >>> On 03.07.18 at 10:46, <David.Laight@...LAB.COM> wrote:
> > From: Jan Beulich
> >> Sent: 03 July 2018 09:36
> > ...
> >> As said there, omitting suffixes from instructions in AT&T mode is bad
> >> practice when operand size cannot be determined by the assembler from
> >> register operands, and is likely going to be warned about by upstream
> >> gas in the future (mine does already).
> > ...
> >> -	bt	$9, EFLAGS(%rsp)		/* interrupts off? */
> >> +	btl	$9, EFLAGS(%rsp)		/* interrupts off? */
> >
> > Hmmm....
> > Does the operand size make any difference at all for the bit instructions?
> > I'm pretty sure that the cpus (386 onwards) have always done aligned 32bit
> > transfers (the docs never actually said aligned).
> > I can't remember whether 64bit mode allows immediates above 31.
> >
> > So gas accepting 'btb $n,memory' is giving a false impression of
> > what actually happens.
> 
> BTB does not exist at all. BTW and (on 64-bit) BTQ do exist though,
> and they have behavior differing from BTL. The only AT&T syntax doc
> I have says that L is the default suffix to be used, but there are cases
> where this wasn't (and maybe still isn't) the case, so omitting a suffix
> when register operands aren't available to size instructions has always
> been a risky game.

I've just looked it up :-)
There are only 16bit, 32bit and 64bit variants.
They mostly affect how much of %cx is used for the bit offset.
With the addition 'may' clauses below - which are more explicit
than they used to be.

"When accessing a bit in memory, the processor may access 4 bytes starting
from the memory address for a 32-bit operand size, using by the following
relationship:
    Effective Address + (4 * (BitOffset DIV 32))

Or, it may access 2 bytes starting from the memory address for a 16-bit
operand, using this relationship:
    Effective Address + (2 * (BitOffset DIV 16))

It may do so even when only a single byte needs to be accessed to reach
the given bit. When using this bit addressing mechanism, software should
avoid referencing areas of memory close to address space holes."
(A strange qualifying clause.)

	David