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Message-ID: <1970525.ZJ2QEpmLmV@aspire.rjw.lan>
Date: Wed, 04 Jul 2018 12:54:16 +0200
From: "Rafael J. Wysocki" <rjw@...ysocki.net>
To: Akshay Adiga <akshay.adiga@...ux.vnet.ibm.com>
Cc: linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
linux-pm@...r.kernel.org, stewart@...ux.vnet.ibm.com,
benh@...nel.crashing.org, svaidy@...ux.vnet.ibm.com,
ego@...ux.vnet.ibm.com, npiggin@...il.com, mpe@...erman.id.au
Subject: Re: [PATCH v3 0/2] powernv/cpuidle Device-tree parsing cleanup
On Tuesday, July 3, 2018 11:20:54 AM CEST Akshay Adiga wrote:
>
> Device-tree parsed multiple time in powernv cpuidle and powernv
> hotplug code.
>
> First to identify supported flags. Second time, to identify deepest_state
> and first deep state. Third time, during cpuidle init to find the available
> idle states. Any change in device-tree format will lead to make changes in
> these 3 places. Errors in device-tree can be handled in a better manner.
>
> This series adds code to parse device tree once and save in global structure.
>
> Changes from v2 :
> - Fix build error (moved a hunk from patch 1 to patch 2)
> Changes from v1 :
> - fold first 2 patches into 1
> - rename pm_ctrl_reg_* as psscr_*
> - added comment stating removal of pmicr parsing code
> - removed parsing code for pmicr
> - add member valid in pnv_idle_states_t to indicate if the psscr-mask/val
> are valid combination,
> - Change function description of pnv_parse_cpuidle_dt
> - Added error handling code.
>
>
> Akshay Adiga (2):
> powernv/cpuidle: Parse dt idle properties into global structure
> powernv/cpuidle: Use parsed device tree values for cpuidle_init
>
> arch/powerpc/include/asm/cpuidle.h | 13 ++
> arch/powerpc/platforms/powernv/idle.c | 216 ++++++++++++++++----------
> drivers/cpuidle/cpuidle-powernv.c | 154 ++++--------------
> 3 files changed, 177 insertions(+), 206 deletions(-)
>
>
I am assuming that this series will go in via the powerpc tree.
Thanks,
Rafael
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