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Message-ID: <CA+M3ks6WLzhJduct8qy3qFLxH2z9PLSvrXNs5Y5NhM2jt2LQEQ@mail.gmail.com>
Date:   Fri, 6 Jul 2018 10:22:20 +0200
From:   Benjamin Gaignard <benjamin.gaignard@...aro.org>
To:     Philippe CORNU <philippe.cornu@...com>
Cc:     Yannick FERTRE <yannick.fertre@...com>,
        Vincent ABRIOU <vincent.abriou@...com>,
        David Airlie <airlied@...ux.ie>,
        "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/stm: ltdc: filter mode pixel clock vs pad constraint

2018-07-03 13:01 GMT+02:00 Philippe CORNU <philippe.cornu@...com>:
> Hi Yannick,
>
> On 06/29/2018 01:22 PM, Yannick Fertre wrote:
>> Filter the requested mode pixel clock frequency according
>> to the pad maximum supported frequency.
>>
>> Signed-off-by: Yannick Fertre <yannick.fertre@...com>

Applied on drm-misc-next.
Thansk,
Benjamin

>> ---
>>   drivers/gpu/drm/stm/ltdc.c | 16 ++++++++++++----
>>   drivers/gpu/drm/stm/ltdc.h |  1 +
>>   2 files changed, 13 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
>> index 00e3262..96d20c2 100644
>> --- a/drivers/gpu/drm/stm/ltdc.c
>> +++ b/drivers/gpu/drm/stm/ltdc.c
>> @@ -491,6 +491,14 @@ static void ltdc_crtc_atomic_disable(struct drm_crtc *crtc,
>>       int target_max = target + CLK_TOLERANCE_HZ;
>>       int result;
>>
>> +     result = clk_round_rate(ldev->pixel_clk, target);
>> +
>> +     DRM_DEBUG_DRIVER("clk rate target %d, available %d\n", target, result);
>> +
>> +     /* Filter modes according to the max frequency supported by the pads */
>> +     if (result > ldev->caps.pad_max_freq_hz)
>> +             return MODE_CLOCK_HIGH;
>> +
>>       /*
>>        * Accept all "preferred" modes:
>>        * - this is important for panels because panel clock tolerances are
>> @@ -502,10 +510,6 @@ static void ltdc_crtc_atomic_disable(struct drm_crtc *crtc,
>>       if (mode->type & DRM_MODE_TYPE_PREFERRED)
>>               return MODE_OK;
>>
>> -     result = clk_round_rate(ldev->pixel_clk, target);
>> -
>> -     DRM_DEBUG_DRIVER("clk rate target %d, available %d\n", target, result);
>> -
>>       /*
>>        * Filter modes according to the clock value, particularly useful for
>>        * hdmi modes that require precise pixel clocks.
>> @@ -1039,11 +1043,15 @@ static int ltdc_get_caps(struct drm_device *ddev)
>>                * does not work on 2nd layer.
>>                */
>>               ldev->caps.non_alpha_only_l1 = true;
>> +             ldev->caps.pad_max_freq_hz = 90000000;
>> +             if (ldev->caps.hw_version == HWVER_10200)
>> +                     ldev->caps.pad_max_freq_hz = 65000000;
>>               break;
>>       case HWVER_20101:
>>               ldev->caps.reg_ofs = REG_OFS_4;
>>               ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1;
>>               ldev->caps.non_alpha_only_l1 = false;
>> +             ldev->caps.pad_max_freq_hz = 150000000;
>>               break;
>>       default:
>>               return -ENODEV;
>> diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
>> index c14e4db..0294d38 100644
>> --- a/drivers/gpu/drm/stm/ltdc.h
>> +++ b/drivers/gpu/drm/stm/ltdc.h
>> @@ -20,6 +20,7 @@ struct ltdc_caps {
>>       u32 bus_width;          /* bus width (32 or 64 bits) */
>>       const u32 *pix_fmt_hw;  /* supported pixel formats */
>>       bool non_alpha_only_l1; /* non-native no-alpha formats on layer 1 */
>> +     int pad_max_freq_hz;    /* max frequency supported by pad */
>
> Thank you for your patch,
>
> Reviewed-by: Philippe Cornu <philippe.cornu@...com>
> Tested-by: Philippe Cornu <philippe.cornu@...com>
>
> Philippe :-)
>
>>   };
>>
>>   #define LTDC_MAX_LAYER      4
>>

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