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Message-ID: <20180710074815.GA30235@mobilestation>
Date: Tue, 10 Jul 2018 10:48:15 +0300
From: Serge Semin <fancer.lancer@...il.com>
To: Mathieu Malaterre <malat@...ian.org>
Cc: Ralf Baechle <ralf@...ux-mips.org>,
Paul Burton <paul.burton@...s.com>,
James Hogan <jhogan@...nel.org>, okaya@...eaurora.org,
chenhc@...ote.com, Sergey.Semin@...latforms.ru,
Linux-MIPS <linux-mips@...ux-mips.org>,
LKML <linux-kernel@...r.kernel.org>,
"# v4 . 11" <stable@...r.kernel.org>
Subject: Re: [PATCH 2/2] mips: mm: Discard ioremap_uncached_accelerated()
method
On Tue, Jul 10, 2018 at 09:15:17AM +0200, Mathieu Malaterre <malat@...ian.org> wrote:
> '
> On Mon, Jul 9, 2018 at 3:57 PM Serge Semin <fancer.lancer@...il.com> wrote:
> >
> > Adaptive ioremap_wc() method is now available (see "mips: mm:
> > Create UCA-based ioremap_wc() method" commit). We can use it for
> > UCA-featured MMIO transactions in the kernel, so we don't need
> > it platform clone ioremap_uncached_accelerated() being declard.
> > Seeing it is also unused anywhere in the kernel code, lets remove
> > it from io.h arch-specific header then.
> >
> > Signed-off-by: Serge Semin <fancer.lancer@...il.com>
> > Singed-off-by: Paul Burton <paul.burton@...s.com>
>
> nit: 'Signed' (on both patches)
>
Good catch! Thanks. Didn't notice the typo. Should have copy-pasted
both the signature and the e-mail from another letter.
I'll fix it if there will be a second version of the patchset. Otherwise
I suppose it would be easier for the integrator to do this.
Regards,
-Sergey
> > Cc: James Hogan <jhogan@...nel.org>
> > Cc: Ralf Baechle <ralf@...ux-mips.org>
> > Cc: linux-mips@...ux-mips.org
> > Cc: stable@...r.kernel.org
> > ---
> > arch/mips/include/asm/io.h | 8 ++------
> > 1 file changed, 2 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
> > index babe5155a..360b7ddeb 100644
> > --- a/arch/mips/include/asm/io.h
> > +++ b/arch/mips/include/asm/io.h
> > @@ -301,15 +301,11 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
> > __ioremap_mode((offset), (size), boot_cpu_data.writecombine)
> >
> > /*
> > - * These two are MIPS specific ioremap variant. ioremap_cacheable_cow
> > - * requests a cachable mapping, ioremap_uncached_accelerated requests a
> > - * mapping using the uncached accelerated mode which isn't supported on
> > - * all processors.
> > + * This is a MIPS specific ioremap variant. ioremap_cacheable_cow
> > + * requests a cachable mapping with CWB attribute enabled.
> > */
> > #define ioremap_cacheable_cow(offset, size) \
> > __ioremap_mode((offset), (size), _CACHE_CACHABLE_COW)
> > -#define ioremap_uncached_accelerated(offset, size) \
> > - __ioremap_mode((offset), (size), _CACHE_UNCACHED_ACCELERATED)
> >
> > static inline void iounmap(const volatile void __iomem *addr)
> > {
> > --
> > 2.12.0
> >
> >
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