linux-kernel - Re: [PATCH] ARM: dts: imx: Add ZII SCU3 ESB

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CAHQ1cqF_=S1hHkLdenuByi0e=71DdkjPWcHBrm-rSMYpE_k3ZQ@mail.gmail.com>
Date:   Wed, 11 Jul 2018 11:35:41 -0700
From:   Andrey Smirnov <andrew.smirnov@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Nikita Yushchenko <nikita.yoush@...entembedded.com>,
        Mark Rutland <mark.rutland@....com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Andrey Gusakov <andrey.gusakov@...entembedded.com>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Fabio Estevam <fabio.estevam@....com>,
        Chris Healy <cphealy@...il.com>,
        Lucas Stach <l.stach@...gutronix.de>
Subject: Re: [PATCH] ARM: dts: imx: Add ZII SCU3 ESB

On Wed, Jul 11, 2018 at 7:57 AM Andrew Lunn <andrew@...n.ch> wrote:
>
> On Tue, Jul 10, 2018 at 10:07:04PM -0700, Andrey Smirnov wrote:
> > +             switch@0 {
> > +                     compatible = "marvell,mv88e6085";
> > +                     reg = <0>;
> > +                     dsa,member = <0 0>;
> > +                     eeprom-length = <512>;
> > +                     interrupt-parent = <&gpio4>;
> > +                     interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
> > +                     interrupt-controller;
> > +                     #interrupt-cells = <2>;
>
> Hi Andrey
>
> I don't see a pinmux for this GPIO. Is one needed?

I got lucky and this pin is configured in GPIO mode out of reset. But
strictly speaking, yeah, I think there should be a pinmux entry for
this. Since things are working as is, I'll send a separate patch
adding that instead of re-spinning this one.

Thanks
Andrey Smirnov