[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1531350835.2021.1@smtp.crapouillou.net>
Date: Thu, 12 Jul 2018 01:13:55 +0200
From: Paul Cercueil <paul@...pouillou.net>
To: Vinod <vkoul@...nel.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Ralf Baechle <ralf@...ux-mips.org>,
Paul Burton <paul.burton@...s.com>,
James Hogan <jhogan@...nel.org>,
Zubair Lutfullah Kakakhel <Zubair.Kakakhel@...tec.com>,
Mathieu Malaterre <malat@...ian.org>,
Daniel Silsby <dansilsby@...il.com>, dmaengine@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mips@...ux-mips.org
Subject: Re: [PATCH 06/14] dmaengine: dma-jz4780: Add support for the JZ4725B
SoC
Le mer. 11 juil. 2018 à 14:18, Vinod <vkoul@...nel.org> a écrit :
> On 10-07-18, 17:45, Paul Cercueil wrote:
>>
>>
>> Le lun. 9 juil. 2018 à 19:14, Vinod <vkoul@...nel.org> a écrit :
>> > On 03-07-18, 14:32, Paul Cercueil wrote:
>> > > The JZ4725B has one DMA core starring six DMA channels.
>> > > As for the JZ4770, each DMA channel's clock can be enabled with
>> > > a register write, the difference here being that once started,
>> it
>> > > is not possible to turn it off.
>> >
>> > ok so disable for this, right..
>> >
>> > > @@ -204,6 +205,8 @@ static inline void
>> > > jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma,
>> > > {
>> > > if (jzdma->version == ID_JZ4770)
>> > > jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKES, BIT(chn));
>> > > + else if (jzdma->version == ID_JZ4725B)
>> > > + jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKE, BIT(chn));
>> >
>> > but you are writing to a different register here..
>>
>> Yes. SoCs >= JZ4770 have the DCKE read-only register, and
>> DCKES/DCKEC to
>> set/clear bits in DCKE.
>> On JZ4725B, DCKE is read/write, but the zeros written are ignored
>> (at least
>> that's what the
>> documentation says).
>
> and that was not documented in the log... so i though it maybe a typo.
Right, I will add a comment in-code to explain that it's normal.
> --
> ~Vinod
Thanks,
-Paul
Powered by blists - more mailing lists