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Message-ID: <CAD8Lp44Ty9x7UF0=QOpqG-Yeo4rg0ep0VfTuW5FaDuXE1VQO+w@mail.gmail.com>
Date: Tue, 24 Jul 2018 07:29:04 -0500
From: Daniel Drake <drake@...lessm.com>
To: Daniel Kurtz <djkurtz@...omium.org>
Cc: Shyam Sundar S K <Shyam-sundar.S-k@....com>,
Nehal Shah <Nehal-bakulchandra.Shah@....com>,
Ken Xue <Ken.Xue@....com>,
Thomas Gleixner <tglx@...utronix.de>,
Linus Walleij <linus.walleij@...aro.org>,
"open list:PIN CONTROL SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Linux Kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] pinctrl/amd: use byte access to clear irq/wake status bits
On Fri, Jul 20, 2018 at 6:38 PM, Daniel Kurtz <djkurtz@...omium.org> wrote:
> Sounds reasonable. How about:
>
> - /* Clear interrupt.
> - * We must read the pin register again, in case the
> - * value was changed while executing
> - * generic_handle_irq() above.
> + /*
> + * Write-1-to-clear irq/wake status bits in MSByte.
> + * All other bits in this byte are read-only.
> + * This avoids modifying the lower 24-bits
> because they may have
> + * changed while executing generic_handle_irq() above.
> */
That looks good. Thanks
Daniel
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