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Message-ID: <87sh41nkz5.fsf@vitty.brq.redhat.com>
Date: Mon, 30 Jul 2018 11:14:54 +0200
From: Vitaly Kuznetsov <vkuznets@...hat.com>
To: Paolo Bonzini <pbonzini@...hat.com>
Cc: Jim Mattson <jmattson@...gle.com>, kvm list <kvm@...r.kernel.org>,
Radim Krčmář <rkrcmar@...hat.com>,
the arch/x86 maintainers <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH RFC] x86/kvm/lapic: always disable MMIO interface in x2APIC mode
Paolo Bonzini <pbonzini@...hat.com> writes:
> On 27/07/2018 18:48, Jim Mattson wrote:
>> On a physical machine, I would expect the default local APIC page to
>> fall in the PCI hole, so it would be correct to sink writes and to
>> return all ones for reads. Does qemu implement a PCI hole, and does
>> this address fall into it?
>
> It does implement a PCI hole, but when using the kernel LAPIC it expects
> that only devices write to that range; therefore that address doesn't
> fall into the PCI hole, and instead it generates an MSIs.
Yes, and that's why I believe it's correct to never forward lapic
reads/writes from KVM to userspace when lapic is in kernel.
"RFC" was mostly about the inconsistency with the case when APIC access
page is in use. To be 100% correct I would suggest to somehow make it
behave like MMIO hole in case we're in x2APIC/disabled mode too.
--
Vitaly
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