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Date:   Fri, 27 Jul 2018 19:00:38 +0200
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Jim Mattson <jmattson@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>
Cc:     kvm list <kvm@...r.kernel.org>,
        Radim Krčmář <rkrcmar@...hat.com>,
        the arch/x86 maintainers <x86@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH RFC] x86/kvm/lapic: always disable MMIO interface in
 x2APIC mode

On 27/07/2018 18:48, Jim Mattson wrote:
> On a physical machine, I would expect the default local APIC page to
> fall in the PCI hole, so it would be correct to sink writes and to
> return all ones for reads. Does qemu implement a PCI hole, and does
> this address fall into it?

It does implement a PCI hole, but when using the kernel LAPIC it expects
that only devices write to that range; therefore that address doesn't
fall into the PCI hole, and instead it generates an MSIs.

Paolo

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