linux-kernel - [PATCH v2 05/18] dt-binding: MIPS: Add documentation of Intel MIPS SoCs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20180803030237.3366-6-songjun.wu@linux.intel.com>
Date:   Fri,  3 Aug 2018 11:02:24 +0800
From:   Songjun Wu <songjun.wu@...ux.intel.com>
To:     hua.ma@...ux.intel.com, yixin.zhu@...ux.intel.com,
        chuanhua.lei@...ux.intel.com, qi-ming.wu@...el.com
Cc:     linux-mips@...ux-mips.org, linux-clk@...r.kernel.org,
        linux-serial@...r.kernel.org, devicetree@...r.kernel.org,
        Songjun Wu <songjun.wu@...ux.intel.com>,
        James Hogan <jhogan@...nel.org>, linux-kernel@...r.kernel.org,
        Paul Burton <paul.burton@...s.com>,
        Rob Herring <robh+dt@...nel.org>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Mark Rutland <mark.rutland@....com>
Subject: [PATCH v2 05/18] dt-binding: MIPS: Add documentation of Intel MIPS SoCs

From: Hua Ma <hua.ma@...ux.intel.com>

This patch adds binding documentation for the
compatible values of the Intel MIPS SoCs.

Signed-off-by: Hua Ma <hua.ma@...ux.intel.com>
Signed-off-by: Songjun Wu <songjun.wu@...ux.intel.com>
---

Changes in v2:
- New patch split from previous patch
- Add the board and chip compatible in dt document

 Documentation/devicetree/bindings/mips/intel.txt | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/intel.txt

diff --git a/Documentation/devicetree/bindings/mips/intel.txt b/Documentation/devicetree/bindings/mips/intel.txt
new file mode 100644
index 000000000000..ac594ef303b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/intel.txt
@@ -0,0 +1,17 @@
+Intel MIPS SoC device tree bindings
+
+1, SoCs
+
+Each device tree must specify a compatible value for the Intel SoC
+it uses in the compatible property of the root node. The compatible
+value must be one of the following values:
+
+  intel,xrx500
+
+2, Boards
+
+Each device tree must specify a compatible value for the Intel Board
+it uses in the compatible property of the root node. The compatible
+value must be one of the following values:
+
+  intel,easy350-anywan
-- 
2.11.0