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Message-ID: <1533661818.2283.264.camel@impinj.com>
Date: Tue, 7 Aug 2018 17:10:19 +0000
From: Trent Piepho <tpiepho@...inj.com>
To: "mark.rutland@....com" <mark.rutland@....com>,
"broonie@...nel.org" <broonie@...nel.org>,
"baolin.wang@...aro.org" <baolin.wang@...aro.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>
CC: "linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
"orsonzhai@...il.com" <orsonzhai@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"lanqing.liu@...eadtrum.com" <lanqing.liu@...eadtrum.com>,
"zhang.lyra@...il.com" <zhang.lyra@...il.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH 2/2] spi: sprd: Add SPI driver for Spreadtrum SC9860
On Tue, 2018-08-07 at 18:43 +0800, Baolin Wang wrote:
>
> +static u32 sprd_spi_transfer_max_timeout(struct sprd_spi *ss,
> + struct spi_transfer *t)
> +{
> + /*
> + * The time spent on transmission of the full FIFO data is the maximum
> + * SPI transmission time.
> + */
> + u32 size = t->bits_per_word * SPRD_SPI_FIFO_SIZE;
> + u32 bit_time_us = SPRD_SPI_HZ / t->speed_hz + 1;
> + u32 total_time_us = size * bit_time_us;
> + /*
> + * There is an interval between data and the data in our SPI hardware,
> + * so the total transmission time need add the interval time.
> + *
> + * The inteval calculation formula:
> + * interval time (source clock cycles) = interval * 4 + 10.
> + */
> + u32 interval_cycle = SPRD_SPI_FIFO_SIZE * ((ss->interval << 2) + 10);
> + u32 interval_time_us = interval_cycle * SPRD_SPI_HZ / ss->src_clk + 1;
If interval is greater than 31, this will overflow.
Also SPRD_SPI_HZ is not the speed anything runs at, as one might think
from the name. It's the number of microseconds in a second. The is
already a Linux macro for that, USEC_PER_SEC, that you should use
instead.
> +
> + return total_time_us + interval_time_us;
> +}
> +
> +static void sprd_spi_set_speed(struct sprd_spi *ss, u32 speed_hz)
> +{
> + /*
> + * From SPI datasheet, the prescale calculation formula:
> + * prescale = SPI source clock / (2 * SPI_freq) - 1;
> + */
> + u32 clk_div = ss->src_clk / (speed_hz << 1) - 1;
You should probably round up here. The convention is to use the
closest speed less than equal to the requested speed, but since this is
a divider, rounding it down will select the next highest speed.
> +
> + writel_relaxed(clk_div, ss->base + SPRD_SPI_CLKD);
> +}
> +
> +
> +static int sprd_spi_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct spi_controller *sctlr;
> + struct resource *res;
> + struct sprd_spi *ss;
> + int ret;
> +
> + pdev->id = of_alias_get_id(pdev->dev.of_node, "spi");
> + sctlr = spi_alloc_master(&pdev->dev, sizeof(*ss));
> + if (!sctlr)
> + return -ENOMEM;
> +
> + ss = spi_controller_get_devdata(sctlr);
> + if (of_property_read_u32(np, "sprd,spi-interval", &ss->interval))
> + ss->interval = SPRD_SPI_ITVL_NUM;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + ss->base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(ss->base)) {
> + ret = PTR_ERR(ss->base);
> + goto free_controller;
> + }
> +
> + ss->dev = &pdev->dev;
> + sctlr->dev.of_node = pdev->dev.of_node;
> + sctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE | SPI_TX_DUAL;
> + sctlr->bus_num = pdev->id;
> + sctlr->setup = sprd_spi_setup;
> + sctlr->set_cs = sprd_spi_chipselect;
> + sctlr->transfer_one = sprd_spi_transfer_one;
> + sctlr->max_speed_hz = (ss->src_clk / 2) < SPRD_SPI_MAX_SPEED_HZ ?
> + ss->src_clk / 2 : SPRD_SPI_MAX_SPEED_HZ;
You can write this as:
sctlr->max_speed_hz = min(ss->src_clk / 2, SPRD_SPI_MAX_SPEED_HZ);
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