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Date:   Thu, 16 Aug 2018 21:22:01 +0800
From:   Pu Wen <puwen@...on.cn>
To:     Boris Ostrovsky <boris.ostrovsky@...cle.com>, tglx@...utronix.de,
        mingo@...hat.com, hpa@...or.com, x86@...nel.org,
        thomas.lendacky@....com, bp@...en8.de, pbonzini@...hat.com,
        jgross@...e.com, JBeulich@...e.com
Cc:     linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org,
        xen-devel@...ts.xenproject.org
Subject: Re: [PATCH v3 13/17] x86/xen: enable Hygon support to Xen

On 2018/8/11 22:34, Boris Ostrovsky wrote:
> On 08/11/2018 09:29 AM, Pu Wen wrote:
>> To make Xen work correctly on Hygon platforms, reuse AMD's Xen support
>> code path and add vendor check for Hygon along with AMD.
>>
>> Signed-off-by: Pu Wen <puwen@...on.cn>
>> ---
>>   arch/x86/xen/pmu.c | 15 ++++++++++++---
>>   1 file changed, 12 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
>> index 7d00d4a..1053dda 100644
>> --- a/arch/x86/xen/pmu.c
>> +++ b/arch/x86/xen/pmu.c
>> @@ -90,6 +90,12 @@ static void xen_pmu_arch_init(void)
>>   			k7_counters_mirrored = 0;
>>   			break;
>>   		}
>> +	} else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
>> +		amd_num_counters = F10H_NUM_COUNTERS;
> 
> I haven't looked in details at Zen's PMU but the PMC section in the spec
> starts with
>    "There are six core performance events counters per thread..."

There are six core performance events counters per thread, so there are
six MSRs for these counters(0-5). Also there are four legacy PMC MSRs,
they are alias of the counters(0-3).

In this version of kernel Zen use the lagacy version of PMU MSRs for Xen.
For safety consideration, Dhyana just fullow this stategy. And it works
fine when VPMU enabled in Xen on Hygon platforms by testing with perf.

Thanks,
Pu Wen

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