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Date:   Thu, 23 Aug 2018 16:59:17 +0200
From:   Pierre Morel <pmorel@...ux.ibm.com>
To:     David Hildenbrand <david@...hat.com>,
        Halil Pasic <pasic@...ux.ibm.com>,
        Tony Krowiak <akrowiak@...ux.ibm.com>,
        Tony Krowiak <akrowiak@...ux.vnet.ibm.com>,
        linux-s390@...r.kernel.org, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org
Cc:     freude@...ibm.com, schwidefsky@...ibm.com,
        heiko.carstens@...ibm.com, borntraeger@...ibm.com,
        cohuck@...hat.com, kwankhede@...dia.com,
        bjsdjshi@...ux.vnet.ibm.com, pbonzini@...hat.com,
        alex.williamson@...hat.com, pmorel@...ux.vnet.ibm.com,
        alifm@...ux.vnet.ibm.com, mjrosato@...ux.vnet.ibm.com,
        jjherne@...ux.vnet.ibm.com, thuth@...hat.com,
        pasic@...ux.vnet.ibm.com, berrange@...hat.com,
        fiuczy@...ux.vnet.ibm.com, buendgen@...ibm.com,
        frankja@...ux.ibm.com
Subject: Re: [PATCH v9 21/22] KVM: s390: CPU model support for AP
 virtualization

On 23/08/2018 15:38, David Hildenbrand wrote:
> On 23.08.2018 15:22, Halil Pasic wrote:
>>
>>
>> On 08/23/2018 02:47 PM, Pierre Morel wrote:
>>> On 23/08/2018 13:12, David Hildenbrand wrote:
>> [..]
>>>>>>>
>>>>>>> I'm confused, which 128 bit?
>>>>>>
>>>>>>
>>>>>> Me too :) , I was assuming this block to be 128bit, but the qci block
>>>>>> has 128 bytes....
>>>>>>
>>>>>> And looking at arch/s390/include/asm/ap.h, there is a lot of information
>>>>>> contained that is definitely not of interest for CPU models...
>>>>>>
>>>>>> I wonder if there is somewhere defined which bits are reserved for
>>>>>> future features/facilities, compared to ap masks and such.
>>>>>>
>>>>>> This is really hard to understand/plan without access to documentation.
>>>>>>
>>>>>> You (Halil, Tony, Pier, ...) should have a look if what I described
>>>>>> related to PQAP(QCI) containing features that should get part of the CPU
>>>>>> model makes sense or not. For now I was thinking that there is some part
>>>>>> inside of QCI that is strictly reserved for facilities/features that we
>>>>>> can use.
>>
>> No there is no such part. The architecture documentation is quite confusing
>> with some aspects (e.g. persistence) of how exactly some of these features
>> work and are indicated. I'm having a hard time finding my opinion. I may
>> end up asking some questions later, but for now i have to think first.
>>
>> Just one hint. There is a programming note stating that if bit 2 of the
>> QCI block is one there is at least one AP card in the machine that actually
>> has APXA installed.
>>
>> I read the architecture so that the APXA has a 'cpu part' (if we are
>> doing APXA the cpu can't spec exception on certain bits not being zor9)
>> and a 'card(s) part'.
>>
>> Since the stuff seems quite difficult to sort out properly, I ask myself
>> are there real problems we must solve?
>>
>> This ultimately seems to be  about the migration, right? You say 'This helps
>> to catch nasty migration bugs (e.g. APXA suddenly disappearing).' at the very
>> beginning of the discussion. Yes, we don't have to have an vfio_ap device,
>> he guest can and will start looking for AP resources if
>> only the cpu model features installed. So the guest could observe
>> a disappearing APXA, but I don't think that would lead to problems (with
>> Linux at least).
>>
>> And there ain't much AP a guest can sanely do without if no AP resources
>> are there.
>>
>> I would really prefer not rushing a solution if we don't have to.
>>
>>>
>>>
>>>>
>>>> What is apsc, qact, rc8a in the qci blocks? are the facility bits?
>>>
>>> Yes, facility bits concerning the AP instructions
>>>
>>
>> According to the current AR document rc8a ain't a facility but bits
>> 0-2 and 4-7 kind of are.
>>
> 
> Easy ( :) ) answer. Everything that is the CPU part should get into the
> CPU model. Everything that is AP specific not. If APXA is not a CPU
> facility, fine with me to leave it out.
> 
> Ack to not rushing, but also ack to not leaving out important things.
> Ack that this stuff is hard to ficure out.

APXA is not a CPU part, it is a machine part (SIE) and a AP part (QCI,TAPQ),
it has no influence on CPU instructions but on the AP instructions.
Consequently, if I understood the definition correctly, it should not go 
in the CPU model.

Regards,
Pierre




-- 
Pierre Morel
Linux/KVM/QEMU in Böblingen - Germany

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