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Message-ID: <fdea2d54-7a68-64ec-8bb4-4a94677a3293@amlogic.com>
Date: Tue, 28 Aug 2018 21:21:48 +0800
From: Liang Yang <liang.yang@...ogic.com>
To: Boris Brezillon <boris.brezillon@...tlin.com>
CC: Yixun Lan <yixun.lan@...ogic.com>, <linux-mtd@...ts.infradead.org>,
Rob Herring <robh@...nel.org>,
Neil Armstrong <narmstrong@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Richard Weinberger <richard@....at>,
<linux-kernel@...r.kernel.org>,
Marek Vasut <marek.vasut@...il.com>,
Jian Hu <jian.hu@...ogic.com>,
Kevin Hilman <khilman@...libre.com>,
Carlo Caione <carlo@...one.org>,
<linux-amlogic@...ts.infradead.org>,
Brian Norris <computersforpeace@...il.com>,
David Woodhouse <dwmw2@...radead.org>,
<linux-arm-kernel@...ts.infradead.org>,
Jerome Brunet <jbrunet@...libre.com>
Subject: Re: [RFC PATCH v2 2/2] mtd: rawnand: meson: add support for Amlogic
NAND flash controller
Hi Boris,
On 8/24/2018 8:48 PM, Boris Brezillon wrote:
> On Wed, 22 Aug 2018 22:08:42 +0800
> Liang Yang <liang.yang@...ogic.com> wrote:
>
>>> You have to wait tWB, that's for sure.
>>>
>> we have a maximum 32 commands fifo. when command is written into
>> NFC_REG_CMD, it doesn't mean that command is executing right now, maybe
>> it is buffering on the queue.Assume one ERASE operation, when 2nd
>> command(0xd0) is written into NFC_REG_CMD and then come into
>> NAND_OP_WAITRDY_INSTR, if I read the RB status by register, it may be
>> wrong because 0xd0 may not being executed. it is unusual unless
>> buffering two many command.
>
> You should flush the queue and wait for it to empty at the end of
> ->exec_op().
>
>> so it seems that i still need to use nand_soft_waitrdy or wait cmd is
>> executed somewhere.
>
> Don't you have a WAIT_FOR_RB instruction? What is NFC_CMD_RB for? Also,
> NFC_CMD_IDLE seems to allow you to add an arbitrary delay, and that's
> probably what you should use for tWB.
>
> em, I can wait for RB by reading the status from register now. but when
calling nand_soft_waitrdy, i really met a problem. One *jiffies* is
about 4ms. When programming, it pass 1ms to
instr->ctx.waitrdy.timeout_ms and nand_soft_waitrdy will be only one
*jiffies* to reach timeout. And then calling nand_soft_waitrdy maybe at
the tail of 4ms interval, it may only wait 100us and next jiffies
arrive. Is it correct?
>
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