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Message-ID: <20180829010230.GA16393@bogus>
Date: Tue, 28 Aug 2018 20:02:30 -0500
From: Rob Herring <robh@...nel.org>
To: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
Cc: linux-snps-arc@...ts.infradead.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org,
Vineet Gupta <Vineet.Gupta1@...opsys.com>,
Alexey Brodkin <Alexey.Brodkin@...opsys.com>,
Linus Walleij <linus.walleij@...aro.org>,
devicetree@...r.kernel.org, Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v2 2/2] dt-bindings: Document the Synopsys GPIO via CREG
bindings
On Tue, Aug 28, 2018 at 02:27:21PM +0300, Eugeniy Paltsev wrote:
> This patch adds documentation of device tree bindings for the Synopsys
> GPIO via CREG driver.
>
> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
> ---
> .../devicetree/bindings/gpio/snps,creg-gpio.txt | 49 ++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt
>
> diff --git a/Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt b/Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt
> new file mode 100644
> index 000000000000..eb022d44ccda
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt
> @@ -0,0 +1,49 @@
> +GPIO via CREG (Control REGisers) driver
REGisters?
Bindings don't describe drivers.
> +
> +This is is single-register MMIO GPIO driver to control such strangely mapped
> +outputs:
> +
> +31 11 8 7 5 0 < bit number
> +| | | | | |
> +[ not used | gpio-1 | shift-1 | gpio-0 | shift-0 ] < 32 bit MMIO register
> + ^ ^
> + | |
> + | write 0x2 == set output to "1" (on)
> + | write 0x3 == set output to "0" (off)
> + |
> + write 0x1 == set output to "1" (on)
> + write 0x4 == set output to "0" (off)
What kind of crazy h/w designer designed this?
> +Required properties:
> +- compatible : "snps,creg-gpio"
> +- reg : Exactly one register range with length 0x4.
> +- #gpio-cells : Should be one - the pin number.
> +- gpio-controller : Marks the device node as a GPIO controller.
> +- snps,ngpios: Number of GPIO pins.
> +- snps,bit-per-line: Number of bits per each gpio line (see picture).
> + Array the size of "snps,ngpios"
> +- snps,shift: Shift (in bits) of the each GPIO field from the previous one in
> + register (see picture). Array the size of "snps,ngpios"
> +- snps,on-val: Value should be set in corresponding field to set
> + output to "1" (see picture). Array the size of "snps,ngpios"
> +- snps,off-val: Value should be set in corresponding field to set
> + output to "0" (see picture). Array the size of "snps,ngpios"
Convince me we need to parameterize all this. We try to avoid describing
h/w like this.
> +
> +Optional properties:
> +- snps,default-val: default output field values. Array the size of "snps,ngpios"
> +
> +Example (see picture):
> +
> +gpio: gpio@...014b0 {
> + compatible = "snps,creg-gpio";
> + reg = <0xf00014b0 0x4>;
> + gpio-controller;
> + #gpio-cells = <1>;
> + snps,ngpios = <2>;
> + snps,shift = <5 1>;
> + snps,bit-per-line = <2 3>;
> + snps,on-val = <2 1>;
> + snps,off-val = <3 4>;
> + snps,default-val = <2 1>;
> +};
> --
> 2.14.4
>
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