linux-kernel - RE: [PATCH 3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <MWHPR0201MB36282BE6CB5BD242480757F8C7090@MWHPR0201MB3628.namprd02.prod.outlook.com>
Date:   Wed, 29 Aug 2018 17:05:20 +0000
From:   Radhey Shyam Pandey <radheys@...inx.com>
To:     Vinod <vkoul@...nel.org>
CC:     "dan.j.williams@...el.com" <dan.j.williams@...el.com>,
        Michal Simek <michals@...inx.com>,
        Appana Durga Kedareswara Rao <appanad@...inx.com>,
        "lars@...afoo.de" <lars@...afoo.de>,
        "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA
 transfer

> -----Original Message-----
> From: Vinod <vkoul@...nel.org>
> Sent: Wednesday, August 29, 2018 9:31 AM
> To: Radhey Shyam Pandey <radheys@...inx.com>
> Cc: dan.j.williams@...el.com; Michal Simek <michals@...inx.com>; Appana
> Durga Kedareswara Rao <appanad@...inx.com>; lars@...afoo.de;
> dmaengine@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org
> Subject: Re: [PATCH 3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA
> transfer
> 
> On 28-08-18, 14:03, Radhey Shyam Pandey wrote:
> > > On 27-07-18, 16:20, Radhey Shyam Pandey wrote:
> > > > In AXI CDMA simple mode also pass MSB bits of source and destination
> > > > address to xilinx_write function. This fixes simple CDMA operation
> > > > mode using 64-bit addressing.
> > > >
> > > > Signed-off-by: Radhey Shyam Pandey
> <radhey.shyam.pandey@...inx.com>
> > > > Signed-off-by: Michal Simek <michal.simek@...inx.com>
> > > > ---
> > > >  drivers/dma/xilinx/xilinx_dma.c |    6 ++++--
> > > >  1 files changed, 4 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/dma/xilinx/xilinx_dma.c
> b/drivers/dma/xilinx/xilinx_dma.c
> > > > index a37871e..2e15d86 100644
> > > > --- a/drivers/dma/xilinx/xilinx_dma.c
> > > > +++ b/drivers/dma/xilinx/xilinx_dma.c
> > > > @@ -1245,8 +1245,10 @@ static void xilinx_cdma_start_transfer(struct
> > > xilinx_dma_chan *chan)
> > > >
> > > >  		hw = &segment->hw;
> > > >
> > > > -		xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw-
> > > >src_addr);
> > > > -		xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw-
> > > >dest_addr);
> > > > +		xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
> > > (dma_addr_t)
> > > > +			     ((u64)hw->src_addr_msb << 32 | hw->src_addr));
> > >
> > > so this is:
> > >         (dma_addr_t)((u64)hw->src_addr_msb << 32 | hw->src_addr)
> > >
> > > what is src_addr data type? I think its u32. It would be better to
> > > update xilinx_write() to take u64 and not dma_addr_t.
> >
> > Yes, src_addr_msb and src_addr BD fields are u32. To explain: There is no
> > prob in xilinx_write it takes dma_addr_t as an arg which is 32/64 bit
> > depending on _DMA_ADDR_T_64BIT. In 64bit CDMA transfer, there was a
> bug
> > i.e in the call to xilinx_write src_addr_msb 32 bits were not passed. To fix
> > that combine MSB and LSB 32 bits before passing it to xilinx_write.
> 
> Yeah that part was clear but the implementation can be better..
Thanks! Separate fields for source address are needed due to CDMA BD structure. 
Please suggest if it doesn't look ok.

> 
> --
> ~Vinod