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Date:   Thu, 30 Aug 2018 17:58:52 -0700
From:   Stephen Boyd <>
To:     Linus Walleij <>
        Bjorn Andersson <>,
        Doug Anderson <>
Subject: [PATCH] pinctrl: qcom: spmi-mpp: Fix drive strength setting

It looks like we parse the drive strength setting here, but never
actually write it into the hardware to update it. Parse the setting and
then write it at the end of the pinconf setting function so that it
actually sticks in the hardware.

Fixes: 0e948042c420 ("pinctrl: qcom: spmi-mpp: Implement support for sink mode")
Cc: Bjorn Andersson <>
Cc: Doug Anderson <>
Signed-off-by: Stephen Boyd <>
 drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c
index 6556dbeae65e..1793a4d05e15 100644
--- a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c
+++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c
@@ -455,7 +455,7 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
 			pad->dtest = arg;
-			arg = pad->drive_strength;
+			pad->drive_strength = arg;
 			if (arg >= PMIC_MPP_AMUX_ROUTE_ABUS4)
@@ -502,6 +502,10 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
 	if (ret < 0)
 		return ret;
+	ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_SINK_CTL, pad->drive_strength);
+	if (ret < 0)
+		return ret;
 	val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;
 	return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);
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