linux-kernel - Re: [PATCH] i2c: xiic: Make the start and the byte count write atomic

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAKfKVtHrN2gGWxrOy5jhhQQ5pxU=XBSym72m8nDYUJvrPGfdiw@mail.gmail.com>
Date:   Thu, 6 Sep 2018 12:38:08 +0530
From:   Shubhrajyoti Datta <shubhrajyoti.datta@...il.com>
To:     Wolfram Sang <wsa@...-dreams.de>
Cc:     linux-i2c@...r.kernel.org, Michal Simek <michal.simek@...inx.com>,
        linux-kernel@...r.kernel.org,
        Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
Subject: Re: [PATCH] i2c: xiic: Make the start and the byte count write atomic

Hi,

On Tue, Sep 4, 2018 at 9:41 PM Wolfram Sang <wsa@...-dreams.de> wrote:
>
> On Mon, Sep 03, 2018 at 03:11:11PM +0530, shubhrajyoti.datta@...il.com wrote:
> > From: Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
> >
> > Disable interrupts while configuring the transfer and enable them back.
> >
> > We have below as the programming sequence
> > 1. start and slave address
> > 2. byte count and stop
> >
> > In some customer platform there was a lot of interrupts between 1 and 2
> > and after slave address (around 7 clock cyles) if 2 is not executed
> > then the transaction is nacked.
> >
> > To fix this case make the 2 writes atomic.
> >
> > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
> > Signed-off-by: Michal Simek <michal.simek@...inx.com>
>
> I assume simply changing the order of the register writes won't fix it?
No that is not possible.
>
> I also assume this is stable material?
>
Yes let me know if you want me to resend with the stable tag?