linux-kernel - Re: [PATCH V3 22/26] dt-bindings: interrupt-controller: C-SKY SMP intc

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Message-ID: <20180907060730.GB16834@guoren>
Date:   Fri, 7 Sep 2018 14:07:30 +0800
From:   Guo Ren <ren_guo@...ky.com>
To:     Arnd Bergmann <arnd@...db.de>
Cc:     Rob Herring <robh@...nel.org>,
        linux-arch <linux-arch@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Jason Cooper <jason@...edaemon.net>,
        c-sky_gcc_upstream@...ky.com, gnu-csky@...tor.com,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        wbx@...ibc-ng.org, Greentime Hu <green.hu@...il.com>
Subject: Re: [PATCH V3 22/26] dt-bindings: interrupt-controller: C-SKY SMP
 intc

On Thu, Sep 06, 2018 at 03:03:16PM +0200, Arnd Bergmann wrote:
> >         INTCG_base = ioremap(mfcr("cr<31, 14>"), INTC_SIZE);
> 
> It that reliable? I remember a similar situation with some registers on ARM
> that are usually identified through a special CPU register, but in some
> cases the SoC integrator put the wrong address in there, so we need to
> look up the address in DT anyway.
Yes, it's reliable. This interrupt is combined with CPU and not on AXI
or APB. Soc just give a hole in the address space and tell the CPU where
the address is with 20 wire-signals.

 Guo Ren