linux-kernel - Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver

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Message-ID: <alpine.DEB.2.21.1809101536410.1292@nanos.tec.linutronix.de>
Date:   Mon, 10 Sep 2018 15:37:31 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Christoph Hellwig <hch@...radead.org>
cc:     Anup Patel <anup@...infault.org>,
        Palmer Dabbelt <palmer@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Jason Cooper <jason@...edaemon.net>,
        Marc Zyngier <marc.zyngier@....com>,
        Atish Patra <atish.patra@....com>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Palmer Dabbelt <palmer@...belt.com>
Subject: Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller
 Driver

On Mon, 10 Sep 2018, Thomas Gleixner wrote:
> On Mon, 10 Sep 2018, Christoph Hellwig wrote:
> > On Sat, Sep 08, 2018 at 12:46:35PM +0200, Thomas Gleixner wrote:
> > > On Thu, 6 Sep 2018, Christoph Hellwig wrote:
> > > 
> > > > Just as before:  NAK to entirely pointless abstractions.  Please stop
> > > > beating the dead horse.
> > > 
> > > I disagree. These interrupts very well fit into the percpu interupt
> > > mechanics and that allows them to be handled by all the generic mechanisms
> > > as any other interrupt.
> > 
> > Just a few weeks ago you said the contrary:
> > 
> > http://lists.infradead.org/pipermail/linux-riscv/2018-August/000943.html
> 
> Sigh. Yes. Now that you remind me. 

Just for clarification. I had the impression that Anup was trying to wire
up more than just the timer interrupt, but that doesn't seem to be the
case.