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Message-ID: <20180910133902.GB21593@infradead.org>
Date: Mon, 10 Sep 2018 06:39:02 -0700
From: Christoph Hellwig <hch@...radead.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Christoph Hellwig <hch@...radead.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Anup Patel <anup@...infault.org>,
Palmer Dabbelt <palmer@...ive.com>,
linux-kernel@...r.kernel.org, Atish Patra <atish.patra@....com>,
Albert Ou <aou@...s.berkeley.edu>,
Palmer Dabbelt <palmer@...belt.com>,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver
On Mon, Sep 10, 2018 at 03:37:31PM +0200, Thomas Gleixner wrote:
> > > Just a few weeks ago you said the contrary:
> > >
> > > http://lists.infradead.org/pipermail/linux-riscv/2018-August/000943.html
> >
> > Sigh. Yes. Now that you remind me.
>
> Just for clarification. I had the impression that Anup was trying to wire
> up more than just the timer interrupt, but that doesn't seem to be the
> case.
He has an irqchip that is called from the RISC-V exception handler
when the interrupt flag is set in scause and then dispatches to one
of: IPI, timer, actual irqchip.
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