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Date: Tue, 11 Sep 2018 09:07:12 +0530 From: Anup Patel <anup@...infault.org> To: Christoph Hellwig <hch@...radead.org> Cc: Palmer Dabbelt <palmer@...ive.com>, Albert Ou <aou@...s.berkeley.edu>, Jason Cooper <jason@...edaemon.net>, Marc Zyngier <marc.zyngier@....com>, Daniel Lezcano <daniel.lezcano@...aro.org>, "linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>, Atish Patra <atish.patra@....com>, Thomas Gleixner <tglx@...utronix.de>, linux-riscv@...ts.infradead.org Subject: Re: [RFC PATCH 1/5] RISC-V: Make IPI triggering flexible On Mon, Sep 10, 2018 at 7:04 PM, Christoph Hellwig <hch@...radead.org> wrote: > On Thu, Sep 06, 2018 at 04:15:14PM +0530, Anup Patel wrote: >> This patch is doing two things: >> 1. Allow IRQCHIP driver to provide IPI trigger mechanism > > And the big questions is why do we want that? The last thing we > want is for people to "innovate" on how they deliver IPIs. RISC-V > has defined an SBI interface for it to hide all the details, and > we should not try to handle systems that are not SBI compliant. > > Eventuall we might want to revisit the SBI to improve on shortcomings > if there are any, but we should not allow random irqchip drivers to > override this. I have already dropped this part from the PATCH v2. > >> 2. Have more generic IPI handler in arch/riscv so that IRQCHIP driver >> can call it > > And that is rather irrelevant without 1) above. Nopes, this is required for the RISC-V INTC driver. Regards, Anup
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