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Date:   Fri, 28 Sep 2018 18:45:01 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...ive.com>
To:     Christoph Hellwig <hch@...radead.org>
CC:     anup@...infault.org, aou@...s.berkeley.edu, jason@...edaemon.net,
        marc.zyngier@....com, daniel.lezcano@...aro.org,
        linux-kernel@...r.kernel.org,
        Christoph Hellwig <hch@...radead.org>, atish.patra@....com,
        tglx@...utronix.de, linux-riscv@...ts.infradead.org
Subject:     Re: [RFC PATCH 1/5] RISC-V: Make IPI triggering flexible

On Mon, 10 Sep 2018 06:34:18 PDT (-0700), Christoph Hellwig wrote:
> On Thu, Sep 06, 2018 at 04:15:14PM +0530, Anup Patel wrote:
>> This patch is doing two things:
>> 1. Allow IRQCHIP driver to provide IPI trigger mechanism
>
> And the big questions is why do we want that?  The last thing we
> want is for people to "innovate" on how they deliver IPIs.  RISC-V
> has defined an SBI interface for it to hide all the details, and
> we should not try to handle systems that are not SBI compliant.
>
> Eventuall we might want to revisit the SBI to improve on shortcomings
> if there are any, but we should not allow random irqchip drivers to
> override this.

I agree.  The whole point of the SBI is to provide an interface that everyone 
uses so we can the go figure out how to make this fast later.  If each platform 
has their own magic IPI hooks then this will end up being a mess.

We've got some schemes floating around to make the SBI fast (essentially an SBI 
VDSO), I'd prefer to push on that rather than adding a bunch of complexity 
here.

>
>> 2. Have more generic IPI handler in arch/riscv so that IRQCHIP driver
>> can call it
>
> And that is rather irrelevant without 1) above.

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