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Message-ID: <20180912225552.GM22824@google.com>
Date: Wed, 12 Sep 2018 15:55:52 -0700
From: Matthias Kaehlcke <mka@...omium.org>
To: Raju P L S S S N <rplsssn@...eaurora.org>
Cc: andy.gross@...aro.org, david.brown@...aro.org,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
rnayak@...eaurora.org, bjorn.andersson@...aro.org,
linux-kernel@...r.kernel.org, sboyd@...nel.org,
evgreen@...omium.org, dianders@...omium.org, ilina@...eaurora.org
Subject: Re: [PATCH v2 6/6] drivers: qcom: rpmh: write PDC data
On Fri, Jul 27, 2018 at 03:34:49PM +0530, Raju P L S S S N wrote:
> From: Lina Iyer <ilina@...eaurora.org>
>
> In addition to requests that are send to the remote processor, the
> controller may allow certain data to be written to the controller for
> use in specific cases like wakeup value when entering idle states.
> Allow a pass through to write PDC data.
>
> Signed-off-by: Lina Iyer <ilina@...eaurora.org>
> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@...eaurora.org>
> ---
> drivers/soc/qcom/rpmh.c | 28 ++++++++++++++++++++++++++++
> include/soc/qcom/rpmh.h | 6 ++++++
> 2 files changed, 34 insertions(+)
>
> diff --git a/drivers/soc/qcom/rpmh.c b/drivers/soc/qcom/rpmh.c
> index 0d276fd..f81488b 100644
> --- a/drivers/soc/qcom/rpmh.c
> +++ b/drivers/soc/qcom/rpmh.c
> @@ -472,6 +472,34 @@ int rpmh_write_batch(const struct device *dev, enum rpmh_state state,
> }
> EXPORT_SYMBOL(rpmh_write_batch);
>
> +/**
> + * rpmh_write_pdc_data: Write PDC data to the controller
> + *
> + * @dev: the device making the request
> + * @cmd: The payload data
> + * @n: The number of elements in payload
> + *
> + * Write PDC data to the controller. The messages are always sent async.
> + *
> + * May be called from atomic contexts.
> + */
> +int rpmh_write_pdc_data(const struct device *dev,
> + const struct tcs_cmd *cmd, u32 n)
> +{
> + DEFINE_RPMH_MSG_ONSTACK(dev, 0, NULL, rpm_msg);
At first I was concerned about the message being created on the stack
and sent asynchronously, however there is no asynchronous access
to the on-stack memory after returning from rpmh_rsc_write_pdc_data().
> + struct rpmh_ctrlr *ctrlr = get_rpmh_ctrlr(dev);
> +
> + if (!n || n > MAX_RPMH_PAYLOAD)
> + return -EINVAL;
> +
> + memcpy(rpm_msg.cmd, cmd, n * sizeof(*cmd));
> + rpm_msg.msg.num_cmds = n;
> + rpm_msg.msg.wait_for_compl = false;
> +
> + return rpmh_rsc_write_pdc_data(ctrlr_to_drv(ctrlr), &rpm_msg.msg);
> +}
> +EXPORT_SYMBOL(rpmh_write_pdc_data);
> +
> static int is_req_valid(struct cache_req *req)
> {
> return (req->sleep_val != UINT_MAX &&
> diff --git a/include/soc/qcom/rpmh.h b/include/soc/qcom/rpmh.h
> index 018788d..d5e736e 100644
> --- a/include/soc/qcom/rpmh.h
> +++ b/include/soc/qcom/rpmh.h
> @@ -28,6 +28,9 @@ int rpmh_write_batch(const struct device *dev, enum rpmh_state state,
>
> int rpmh_mode_solver_set(const struct device *dev, bool enable);
>
> +int rpmh_write_pdc_data(const struct device *dev,
> + const struct tcs_cmd *cmd, u32 n);
> +
> #else
>
> static inline int rpmh_write(const struct device *dev, enum rpmh_state state,
> @@ -56,6 +59,9 @@ static inline int rpmh_ctrlr_idle(const struct device *dev)
> static inline int rpmh_mode_solver_set(const struct device *dev, bool enable)
> { return -ENODEV; }
>
> +static inline int rpmh_write_pdc_data(const struct device *dev,
> + const struct tcs_cmd *cmd, u32 n)
> +{ return -ENODEV; }
> #endif /* CONFIG_QCOM_RPMH */
>
> #endif /* __SOC_QCOM_RPMH_H__ */
Reviewed-by: Matthias Kaehlcke <mka@...omium.org>
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