[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1536962096-233842-1-git-send-email-atish.patra@wdc.com>
Date: Fri, 14 Sep 2018 14:54:53 -0700
From: Atish Patra <atish.patra@....com>
To: palmer@...ive.com, linux-riscv@...ts.infradead.org,
hch@...radead.org
Cc: anup@...infault.org, atish.patra@....com, mark.rutland@....com,
tglx@...utronix.de, linux-kernel@...r.kernel.org,
Damien.LeMoal@....com, marc.zyngier@....com, robh@...nel.org
Subject: [RFC 0/3] Timer code cleanup
This patch series address some required timer cleanups in RISC-V.
Atish Patra (2):
RISC-V:Support per-hart timebase-frequency
RISC-V: Remove per cpu clocksource
Palmer Dabbelt (1):
dt-bindings: Correct RISC-V's timebase-frequency
Documentation/devicetree/bindings/riscv/cpus.txt | 4 +++-
arch/riscv/kernel/time.c | 9 +--------
drivers/clocksource/riscv_timer.c | 22 ++++++++++++++++++----
3 files changed, 22 insertions(+), 13 deletions(-)
--
2.7.4
Powered by blists - more mailing lists