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Message-Id: <1536962096-233842-2-git-send-email-atish.patra@wdc.com>
Date: Fri, 14 Sep 2018 14:54:54 -0700
From: Atish Patra <atish.patra@....com>
To: palmer@...ive.com, linux-riscv@...ts.infradead.org,
hch@...radead.org
Cc: anup@...infault.org, atish.patra@....com, mark.rutland@....com,
tglx@...utronix.de, linux-kernel@...r.kernel.org,
Damien.LeMoal@....com, marc.zyngier@....com, robh@...nel.org
Subject: [RFC 1/3] dt-bindings: Correct RISC-V's timebase-frequency
From: Palmer Dabbelt <palmer@...ive.com>
Someone must have read the device tree specification incorrectly,
because we were putting timebase-frequency in the wrong place. This
corrects the issue, moving it from
/ {
cpus {
timebase-frequency = X;
}
}
to
/ {
cpus {
cpu@0 {
timebase-frequency = X;
}
}
}
This is great, because the timer's frequency should really be a per-cpu
quantity on RISC-V systems since there's a timer per CPU. This should
lead to some cleanups in our timer driver.
Signed-off-by: Palmer Dabbelt <palmer@...ive.com>
Signed-off-by: Christoph Hellwig <hch@....de>
Reviewed-by: Rob Herring <robh@...nel.org>
---
Documentation/devicetree/bindings/riscv/cpus.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/riscv/cpus.txt b/Documentation/devicetree/bindings/riscv/cpus.txt
index adf7b7af..b0b038d6 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.txt
+++ b/Documentation/devicetree/bindings/riscv/cpus.txt
@@ -93,9 +93,9 @@ Linux is allowed to run on.
cpus {
#address-cells = <1>;
#size-cells = <0>;
- timebase-frequency = <1000000>;
cpu@0 {
clock-frequency = <1600000000>;
+ timebase-frequency = <1000000>;
compatible = "sifive,rocket0", "riscv";
device_type = "cpu";
i-cache-block-size = <64>;
@@ -113,6 +113,7 @@ Linux is allowed to run on.
};
cpu@1 {
clock-frequency = <1600000000>;
+ timebase-frequency = <1000000>;
compatible = "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
@@ -145,6 +146,7 @@ Example: Spike ISA Simulator with 1 Hart
This device tree matches the Spike ISA golden model as run with `spike -p1`.
cpus {
+ timebase-frequency = <1000000>;
cpu@0 {
device_type = "cpu";
reg = <0x00000000>;
--
2.7.4
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