linux-kernel - Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAAhSdy1gD3tZLmBzfpJV1qQKsG4GKgLkoBC7v5Kycw8KX+YeLg@mail.gmail.com>
Date:   Mon, 17 Sep 2018 19:58:21 +0530
From:   Anup Patel <anup@...infault.org>
To:     Christoph Hellwig <hch@...radead.org>
Cc:     Palmer Dabbelt <palmer@...ive.com>,
        Jason Cooper <jason@...edaemon.net>,
        Marc Zyngier <marc.zyngier@....com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        "linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
        Atish Patra <atish.patra@....com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Palmer Dabbelt <palmer@...belt.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver

On Mon, Sep 17, 2018 at 7:44 PM Christoph Hellwig <hch@...radead.org> wrote:
>
> On Mon, Sep 10, 2018 at 10:08:58PM +0530, Anup Patel wrote:
> > > They could in theory IFF someone actually get the use case through
> > > the riscv privileged spec working group.
> >
> > Their is no point in having each and every possible local interrupts
> > defined by RISC-V spec because some of these will be CPU
> > implementation specific in which case these local interrupts will
> > be described in platform specific DT passed to Linux.
>
> Again, to legally have implementation specific local interrupt types
> you'll first need to convice the spec to change the status for those
> fields from reserved to implementation specific.

I agree, this needs to be first clarified in RISC-V spec. May be this is
a good topic for discussion in any upcoming RISC-V meetup.

Until then anyone can try these patches from riscv_intc_v2 branch of
https://github.com/avpatel/linux

Regards,
Anup