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Message-ID: <alpine.DEB.2.21.1809171703220.16580@nanos.tec.linutronix.de>
Date:   Mon, 17 Sep 2018 17:04:54 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Christoph Hellwig <hch@...radead.org>
cc:     Atish Patra <atish.patra@....com>, palmer@...ive.com,
        linux-riscv@...ts.infradead.org, mark.rutland@....com,
        robh@...nel.org, Damien.LeMoal@....com, marc.zyngier@....com,
        anup@...infault.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC 3/3] RISC-V: Remove per cpu clocksource

On Mon, 17 Sep 2018, Christoph Hellwig wrote:
> > Just for the record, this would be the first (architected) timer ever which
> > just works. I'm having a hard time to believe this, but I'd certainly
> > welcome it.
> 
> And that would be the contact with reality.

I've dealt with the reality of timers for a long time ....

Thanks,

	tglx

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