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Message-ID: <9529c765-cb3b-02f9-df15-4f79cfa48e47@exceet.de>
Date: Tue, 18 Sep 2018 10:22:11 +0200
From: Frieder Schrempf <frieder.schrempf@...eet.de>
To: Boris Brezillon <boris.brezillon@...tlin.com>,
Yogesh Gaur <yogeshnarayan.gaur@....com>
Cc: linux-mtd@...ts.infradead.org, marek.vasut@...il.com,
linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
robh@...nel.org, mark.rutland@....com, shawnguo@...nel.org,
linux-arm-kernel@...ts.infradead.org, computersforpeace@...il.com,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/5] spi: spi-mem: Add driver for NXP FlexSPI
controller
Hi Boris, Yogesh,
On 17.09.2018 13:37, Boris Brezillon wrote:
> Hi Yogesh,
>
> On Mon, 17 Sep 2018 15:18:26 +0530
> Yogesh Gaur <yogeshnarayan.gaur@....com> wrote:
>
>> +
>> + /*
>> + * R/W functions for big- or little-endian registers:
>> + * The FSPI controller's endianness is independent of
>> + * the CPU core's endianness. So far, although the CPU
>> + * core is little-endian the FSPI controller can use
>> + * big-endian or little-endian.
>> + */
>> + if (of_property_read_bool(np, "big-endian")) {
>> + f->write = fspi_writel_be;
>> + f->read = fspi_readl_be;
>> + } else {
>> + f->write = fspi_writel;
>> + f->read = fspi_readl;
>> + }
>
> Hm, isn't it something you can extract from the compatible string? I'd
> rather not allow users to set that in their DT if it's not something
> you can change.
This was copied from the QSPI driver, but I think Boris is right. This
seems to be a fixed SOC-specific setting and we shouldn't set it in the
DT. This applies to QSPI and FSPI alike.
Regards,
Frieder
>
> Regards,
>
> Boris
>
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