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Message-ID: <alpine.DEB.2.21.1809271659410.8118@nanos.tec.linutronix.de>
Date: Thu, 27 Sep 2018 17:00:38 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Peter Zijlstra <peterz@...radead.org>
cc: Andi Kleen <ak@...ux.intel.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
kan.liang@...ux.intel.com, mingo@...hat.com, len.brown@...el.com,
linux-kernel@...r.kernel.org, x86@...nel.org
Subject: Re: [PATCH] x86/cpu: Rename Denverton and Gemini Lake
On Thu, 27 Sep 2018, Peter Zijlstra wrote:
> On Thu, Sep 27, 2018 at 04:49:18PM +0200, Thomas Gleixner wrote:
> > > Subject: x86/cpu: Sanitize FAM6_ATOM naming
> > > From: Peter Zijlstra <peterz@...radead.org>
> > > Date: Tue, 7 Aug 2018 10:17:27 -0700
> > >
> > > Going primarily by:
> > >
> > > https://en.wikipedia.org/wiki/List_of_Intel_Atom_microprocessors#Silvermont_microarchitecture
> > >
> > > with additional information gleaned from other related pages; notably:
> > >
> > > - Bonnell shrink was called Saltwell
> > > - Moorefield is the Merriefield refresh which makes it Airmont
> > >
> > > The general naming scheme is: FAM6_ATOM_UARCH_SOCTYPE
> > >
> > > Cc: x86@...nel.org
> > > Cc: mingo@...hat.com
> > > Cc: ak@...ux.intel.com
> > > Cc: tglx@...utronix.de
> > > Cc: dave.hansen@...ux.intel.com
> > > Cc: len.brown@...el.com
> > > Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> >
> > Which way do we route that?
>
> I have it stuck in with some perf patches, does that work?
Sure. We just should do a quick check against -next for the files outside
the tip realm.
Thanks,
tglx
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