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Message-ID: <ceced0d550bc30d4f3e66d2c7f569c39ca890ce4.camel@gmail.com>
Date:   Mon, 01 Oct 2018 11:48:54 +0300
From:   Yasha Cherikovsky <yasha.che3@...il.com>
To:     Marc Zyngier <marc.zyngier@....com>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Paul Burton <paul.burton@...s.com>,
        James Hogan <jhogan@...nel.org>, linux-mips@...ux-mips.org
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC 5/5] MIPS: Add Realtek RTL8186 SoC support

Hi Marc,

On Mon, 2018-10-01 at 09:19 +0100, Marc Zyngier wrote:
> Hi Yasha,
> 
> On 30/09/18 15:15, Yasha Cherikovsky wrote:
> > The Realtek RTL8186 SoC is a MIPS based SoC
> > used in some home routers [1][2].
> > 
> > The hardware includes Lexra LX5280 CPU with a TLB,
> > two Ethernet controllers, a WLAN controller and more.
> > 
> > With this patch, it is possible to successfully boot
> > the kernel and load userspace on the Edimax BR-6204Wg
> > router.
> > Network drivers support will come in future patches.
> > 
> > This patch includes:
> > - New MIPS rtl8186 platform
> >      - Core platform setup code (mostly DT based)
> >      - New Kconfig option
> >      - defconfig file
> >      - MIPS zboot UART support
> > - RTL8186 interrupt controller driver
> > - RTL8186 timer driver
> > - Device tree files for the RTL8186 SoC and Edimax BR-6204Wg
> >    router
> > 
> > [1] https://www.linux-mips.org/wiki/Realtek_SOC#Realtek_RTL8186
> > [2] https://wikidevi.com/wiki/Realtek_RTL8186
> > 
> > Signed-off-by: Yasha Cherikovsky <yasha.che3@...il.com>
> > Cc: Ralf Baechle <ralf@...ux-mips.org>
> > Cc: Paul Burton <paul.burton@...s.com>
> > Cc: James Hogan <jhogan@...nel.org>
> > Cc: Thomas Gleixner <tglx@...utronix.de>
> > Cc: Jason Cooper <jason@...edaemon.net>
> > Cc: Marc Zyngier <marc.zyngier@....com>
> > Cc: Daniel Lezcano <daniel.lezcano@...aro.org>
> > Cc: Rob Herring <robh+dt@...nel.org>
> > Cc: Mark Rutland <mark.rutland@....com>
> > Cc: linux-mips@...ux-mips.org
> > Cc: devicetree@...r.kernel.org
> > Cc: linux-kernel@...r.kernel.org
> > ---
> >   arch/mips/Kbuild.platforms                    |   1 +
> >   arch/mips/Kconfig                             |  17 ++
> >   arch/mips/boot/compressed/uart-16550.c        |   5 +
> >   arch/mips/boot/dts/Makefile                   |   1 +
> >   arch/mips/boot/dts/realtek/Makefile           |   4 +
> >   arch/mips/boot/dts/realtek/rtl8186.dtsi       |  86 +++++++
> >   .../dts/realtek/rtl8186_edimax_br_6204wg.dts  |  45 ++++
> >   arch/mips/configs/rtl8186_defconfig           | 112 +++++++++
> >   arch/mips/include/asm/mach-rtl8186/rtl8186.h  |  37 +++
> >   arch/mips/rtl8186/Makefile                    |   2 +
> >   arch/mips/rtl8186/Platform                    |   7 +
> >   arch/mips/rtl8186/irq.c                       |   8 +
> >   arch/mips/rtl8186/prom.c                      |  15 ++
> >   arch/mips/rtl8186/setup.c                     |  80 +++++++
> >   arch/mips/rtl8186/time.c                      |  10 +
> >   drivers/clocksource/Kconfig                   |   9 +
> >   drivers/clocksource/Makefile                  |   1 +
> >   drivers/clocksource/timer-rtl8186.c           | 220
> > ++++++++++++++++++
> >   drivers/irqchip/Kconfig                       |   5 +
> >   drivers/irqchip/Makefile                      |   1 +
> >   drivers/irqchip/irq-rtl8186.c                 | 107 +++++++++
> 
> Could you please split this into at least three patches (arch code, 
> clocksource, irqchip) to ease the review?
> 
> Thanks,
> 
> 	M.

Currently the RTL8186_IRQ and the RTL8186_TIMER Kconfig entries depend on
MACH_RTL8186 (which is added in the MIPS portion of the same patch).
Also, MACH_RTL8186 in MIPS selects these two options.

What is the best way to split that?

Thanks,
Yasha

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