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Date:   Mon, 1 Oct 2018 10:51:36 +0200
From:   Quentin Schulz <quentin.schulz@...tlin.com>
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     davem@...emloft.net, andrew@...n.ch, allan.nielsen@...rochip.com,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        thomas.petazzoni@...tlin.com,
        Raju Lakkaraju <Raju.Lakkaraju@...rochip.com>
Subject: Re: [PATCH net-next 2/5] net: phy: mscc: Add EEE init sequence

Hi Florian,

On Fri, Sep 14, 2018 at 07:21:09PM -0700, Florian Fainelli wrote:
> 
> 
> On 09/14/18 01:33, Quentin Schulz wrote:
> > From: Raju Lakkaraju <Raju.Lakkaraju@...rochip.com>
> > 
> > Microsemi PHYs (VSC 8530/31/40/41) need to update the Energy Efficient
> > Ethernet initialization sequence.
> > In order to avoid certain link state errors that could result in link
> > drops and packet loss, the physical coding sublayer (PCS) must be
> > updated with settings related to EEE in order to improve performance.
> > 
> > Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@...rochip.com>
> > Signed-off-by: Quentin Schulz <quentin.schulz@...tlin.com>
> > ---
> 
> [snip]
> 
> > +	vsc85xx_tr_write(phydev, 0x0f82, 0x0012b00a);
> 
> Can you just make this an array of register + value pair? That would be

Sure, I'll.

> less error prone in case you need to update that sequence in the future.
> 

I'm curious about the kind of errors you're worrying about or have
experienced. Do you have any particular example or thought in mind?

> With that:
> 
> Reviewed-by: Florian Fainelli <f.fainelli@...il.com>

Thanks,
Quentin

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