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Message-ID: <alpine.DEB.2.21.1810141055440.1438@nanos.tec.linutronix.de>
Date: Sun, 14 Oct 2018 10:57:57 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Christoph Hellwig <hch@....de>
cc: x86@...nel.org, tedheadster@...il.com, konrad.wilk@...cle.com,
iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> > On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> >
> > > We already build the swiotlb code for 32b-t kernels with PAE support,
> > > but the code to actually use swiotlb has only been enabled for 64-bit
> > > kernel for an unknown reason.
> > >
> > > Before Linux 4.18 we papers over this fact because the networking code,
> > > the scsi layer and some random block drivers implenented their own
> > > bounce buffering scheme.
> > >
> > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
Please use the first 12 characters of the commit SHA for fixes tags in the
future, as documented. No need to resend, I fixed it up for you and added a
Cc: stable as well
Thanks,
tglx
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