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Message-ID: <3ce1d67a-4e3c-e8d8-f7fc-79649f1def68@arm.com>
Date: Mon, 15 Oct 2018 14:11:52 +0100
From: Robin Murphy <robin.murphy@....com>
To: hannah@...vell.com, catalin.marinas@....com, will.deacon@....com,
corbet@....net, joro@...tes.org, robh+dt@...nel.org,
gregory.clement@...tlin.com, mark.rutland@....com,
jason@...edaemon.net, andrew@...n.ch,
sebastian.hesselbarth@...il.com
Cc: devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
omrii@...vell.com, linux-kernel@...r.kernel.org,
nadavh@...vell.com, iommu@...ts.linux-foundation.org,
thomas.petazzoni@...tlin.com, linux-arm-kernel@...ts.infradead.org,
nd@....com
Subject: Re: [PATCH 3/4] dt-bindings: iommu/arm, smmu: add compatible string
for Marvell
On 15/10/18 13:00, hannah@...vell.com wrote:
> From: Hanna Hawa <hannah@...vell.com>
>
> Add specific compatible string for Marvell usage due errata of
> accessing 64bit registers of ARM SMMU, in AP806.
>
> AP806 SOC use the generic ARM-MMU500, and there's no specific
> implementation of Marvell, this compatible is used for errata only.
Given that, I think something more specific like:
"marvell,ap806-smmu", "arm,mmu-500";
would be most appropriate. Otherwise, if some future Marvell SoC were to
ever come out with a *different* MMU-500 integration problem, you'd
already have painted yourself into a corner.
Alternatively (or additionally), we could perhaps consider a separate
property like "marvell,32bit-config-access", to mirror the existing
handling of the secure integration bug.
Robin.
> Signed-off-by: Hanna Hawa <hannah@...vell.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index 8a6ffce..92d7263 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -16,6 +16,7 @@ conditions.
> "arm,mmu-400"
> "arm,mmu-401"
> "arm,mmu-500"
> + "marvell,mmu-500"
> "cavium,smmu-v2"
>
> depending on the particular implementation and/or the
>
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