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Message-ID: <tencent_618B672134A6B5732D255D23@qq.com>
Date:   Fri, 19 Oct 2018 14:23:27 +0800
From:   "陈华才" <chenhc@...ote.com>
To:     "Sudeep Holla" <sudeep.holla@....com>
Cc:     "Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
        "Rafael J . Wysocki" <rafael@...nel.org>,
        "LKML" <linux-kernel@...r.kernel.org>,
        "zhangfx" <zhangfx@...ote.com>,
        "wuzhangjin" <wuzhangjin@...il.com>,
        "Sudeep Holla" <sudeep.holla@....com>
Subject: Re: [PATCH] cacheinfo: Keep the old value if of_property_read_u32fails

Hi, Sudeep,

I use MIPS, and there is no "size" in /sys/devices/system/cpu/cpuX/cache/indexX/ file after your patch. Because the DT node only has "next-level-cache = <&L2>;"  but has no "size" information.

Huacai
 
 
------------------ Original ------------------
From:  "Sudeep Holla"<sudeep.holla@....com>;
Date:  Thu, Oct 18, 2018 05:15 PM
To:  "Huacai Chen"<chenhc@...ote.com>;
Cc:  "Greg Kroah-Hartman"<gregkh@...uxfoundation.org>; "Rafael J . Wysocki"<rafael@...nel.org>; "LKML"<linux-kernel@...r.kernel.org>; "zhangfx"<zhangfx@...ote.com>; "wuzhangjin"<wuzhangjin@...il.com>; "Sudeep Holla"<sudeep.holla@....com>;
Subject:  Re: [PATCH] cacheinfo: Keep the old value if of_property_read_u32fails
 
Hi Huacai,

On Thu, Oct 18, 2018 at 09:28:11AM +0800, Huacai Chen wrote:
> Hi, Sudeep,
> 
> Please see this call-graph:
> 
> static int detect_cache_attributes(unsigned int cpu)
>         ....
>         ret = populate_cache_leaves(cpu);
>         ....
>         ret = cache_shared_cpu_map_setup(cpu); -->
> cache_setup_of_node() --> cache_of_set_props() -->
> cache_size()/cache_nr_sets
> 
> populate_cache_leaves() is arch-specific, All archs except arm64 have
> provide initial values to cacheinfo:size and cacheinfo:number_of_sets.
> 
> Related files:
> arch/nds32/kernel/cacheinfo.c
> arch/mips/kernel/cacheinfo.c

Only above 2 could be affected, but I want to be sure. I wasn't aware
of MIPS arch setting values elsewhere, assumed DT, my bad.
You have still not answered my question. Which arch are you facing issue ?
Or are you proposing this by code inspection ? I changes look fine, but
want to be sure if the issue you are seeing is in above architectures.

--
Regards,
Sudeep

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