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Message-ID: <tip-33823f4d63f7a010653d219800539409a78ef4be@git.kernel.org>
Date:   Wed, 24 Oct 2018 22:45:58 -0700
From:   tip-bot for Fenghua Yu <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     torvalds@...ux-foundation.org, brgerst@...il.com,
        linux-kernel@...r.kernel.org, luto@...capital.net,
        dvlasenk@...hat.com, ashok.raj@...el.com, bp@...en8.de,
        fenghua.yu@...el.com, tglx@...utronix.de, ravi.v.shankar@...el.com,
        peterz@...radead.org, hpa@...or.com, mingo@...nel.org
Subject: [tip:x86/urgent] x86/cpufeatures: Enumerate MOVDIRI instruction

Commit-ID:  33823f4d63f7a010653d219800539409a78ef4be
Gitweb:     https://git.kernel.org/tip/33823f4d63f7a010653d219800539409a78ef4be
Author:     Fenghua Yu <fenghua.yu@...el.com>
AuthorDate: Wed, 24 Oct 2018 14:57:16 -0700
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 25 Oct 2018 07:42:48 +0200

x86/cpufeatures: Enumerate MOVDIRI instruction

MOVDIRI moves doubleword or quadword from register to memory through
direct store which is implemented by using write combining (WC) for
writing data directly into memory without caching the data.

Programmable agents can handle streaming offload (e.g. high speed packet
processing in network). Hardware implements a doorbell (tail pointer)
register that is updated by software when adding new work-elements to
the streaming offload work-queue.

MOVDIRI can be used as the doorbell write which is a 4-byte or 8-byte
uncachable write to MMIO. MOVDIRI has lower overhead than other ways
to write the doorbell.

Availability of the MOVDIRI instruction is indicated by the presence of
the CPUID feature flag MOVDIRI(CPUID.0x07.0x0:ECX[bit 27]).

Please check the latest Intel Architecture Instruction Set Extensions
and Future Features Programming Reference for more details on the CPUID
feature MOVDIRI flag.

Signed-off-by: Fenghua Yu <fenghua.yu@...el.com>
Cc: Andy Lutomirski <luto@...capital.net>
Cc: Ashok Raj <ashok.raj@...el.com>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Brian Gerst <brgerst@...il.com>
Cc: Denys Vlasenko <dvlasenk@...hat.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Ravi V Shankar <ravi.v.shankar@...el.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Link: http://lkml.kernel.org/r/1540418237-125817-2-git-send-email-fenghua.yu@intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 89a048c2faec..90934ee7b79a 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -331,6 +331,7 @@
 #define X86_FEATURE_LA57		(16*32+16) /* 5-level page tables */
 #define X86_FEATURE_RDPID		(16*32+22) /* RDPID instruction */
 #define X86_FEATURE_CLDEMOTE		(16*32+25) /* CLDEMOTE instruction */
+#define X86_FEATURE_MOVDIRI		(16*32+27) /* MOVDIRI instruction */
 
 /* AMD-defined CPU features, CPUID level 0x80000007 (EBX), word 17 */
 #define X86_FEATURE_OVERFLOW_RECOV	(17*32+ 0) /* MCA overflow recovery support */

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