[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <6CD573FD-3B38-45B1-9DC6-B5F0E9087FB4@intel.com>
Date: Thu, 25 Oct 2018 23:03:31 +0000
From: "Bae, Chang Seok" <chang.seok.bae@...el.com>
To: Andy Lutomirski <luto@...nel.org>
CC: Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Juergen Gross <jgross@...e.com>,
xen-devel <xen-devel@...ts.xenproject.org>,
Ingo Molnar <mingo@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>, Andi Kleen <ak@...ux.intel.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"Metzger, Markus T" <markus.t.metzger@...el.com>,
"Shankar, Ravi V" <ravi.v.shankar@...el.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [v3 04/12] x86/fsgsbase/64: Enable FSGSBASE instructions in the
helper functions
> On Oct 25, 2018, at 16:00, Andy Lutomirski <luto@...nel.org> wrote:
>
> On Thu, Oct 25, 2018 at 12:32 AM Bae, Chang Seok
> <chang.seok.bae@...el.com> wrote:
>>
>>
>>> On Oct 24, 2018, at 12:16, Andy Lutomirski <luto@...nel.org> wrote:
>>>
>>> On Tue, Oct 23, 2018 at 11:43 AM Chang S. Bae <chang.seok.bae@...el.com> wrote:
>>>> void x86_fsbase_write_cpu(unsigned long fsbase)
>>>> {
>>>> - /*
>>>> - * Set the selector to 0 as a notion, that the segment base is
>>>> - * overwritten, which will be checked for skipping the segment load
>>>> - * during context switch.
>>>> - */
>>>> - loadseg(FS, 0);
>>>> - wrmsrl(MSR_FS_BASE, fsbase);
>>>> + if (static_cpu_has(X86_FEATURE_FSGSBASE)) {
>>>> + wrfsbase(fsbase);
>>>> + } else {
>>>> + /*
>>>> + * Set the selector to 0 as a notion, that the segment base is
>>>> + * overwritten, which will be checked for skipping the segment load
>>>> + * during context switch.
>>>> + */
>>>> + loadseg(FS, 0);
>>>> + wrmsrl(MSR_FS_BASE, fsbase);
>>>> + }
>>>> }
>>>>
>>>> void x86_gsbase_write_cpu_inactive(unsigned long gsbase)
>>>> {
>>>> - /* Set the selector to 0 for the same reason as %fs above. */
>>>> - loadseg(GS, 0);
>>>> - wrmsrl(MSR_KERNEL_GS_BASE, gsbase);
>>>> + if (static_cpu_has(X86_FEATURE_FSGSBASE)) {
>>>> + wr_inactive_gsbase(gsbase);
>>>> + } else {
>>>> + /* Set the selector to 0 for the same reason as %fs above. */
>>>> + loadseg(GS, 0);
>>>> + wrmsrl(MSR_KERNEL_GS_BASE, gsbase);
>>>
>>> I still don't get what this code is trying to do. See other email. I
>>> think it will straight up crash the kernel on some CPUs, since writing
>>> 0 to %%gs will zero out the *active* base on some CPUs.
>>>
>>
>> On those CPUs, how the old do_arch_prctl_64() worked?
>> loadseg(GS, 0) eventually hits the native_load_gs_index entry, where actual
>> mov …, %gs is wrapped by two SWAPGSes. So, it won’t cause the side effect
>> of overwriting the *active* base, I think.
>>
>>> I think that, if you really want some fancy optimization for the
>>> non-FSGSBASE case, you need to pull that out into the callers of these
>>> helpers.
>>
>
> I was thinking of loadsegment, not loadseg. Sorry!
No problem! Appreciate your reviews.
Chang
Powered by blists - more mailing lists