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Message-ID: <VI1PR04MB4800F4B5009B90F50B9C70F7F3F70@VI1PR04MB4800.eurprd04.prod.outlook.com>
Date:   Thu, 25 Oct 2018 04:19:43 +0000
From:   Vabhav Sharma <vabhav.sharma@....com>
To:     Stephen Boyd <sboyd@...nel.org>, Shawn Guo <shawnguo@...nel.org>
CC:     "sudeep.holla@....com" <sudeep.holla@....com>,
        "oss@...error.net" <oss@...error.net>,
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        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
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        Sriram Dash <sriram.dash@....com>
Subject: RE: [PATCH v4 5/6] arm64: dts: add QorIQ LX2160A SoC support



> -----Original Message-----
> From: devicetree-owner@...r.kernel.org <devicetree-owner@...r.kernel.org>
> On Behalf Of Stephen Boyd
> Sent: Monday, October 15, 2018 10:19 PM
> To: Shawn Guo <shawnguo@...nel.org>; Vabhav Sharma
> <vabhav.sharma@....com>
> Cc: sudeep.holla@....com; oss@...error.net; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org; robh+dt@...nel.org; mark.rutland@....com;
> linuxppc-dev@...ts.ozlabs.org; linux-arm-kernel@...ts.infradead.org;
> mturquette@...libre.com; rjw@...ysocki.net; viresh.kumar@...aro.org;
> linux-clk@...r.kernel.org; linux-pm@...r.kernel.org; linux-kernel-
> owner@...r.kernel.org; catalin.marinas@....com; will.deacon@....com;
> gregkh@...uxfoundation.org; arnd@...db.de;
> kstewart@...uxfoundation.org; yamada.masahiro@...ionext.com; Leo Li
> <leoyang.li@....com>; linux@...linux.org.uk; Varun Sethi
> <V.Sethi@....com>; Udit Kumar <udit.kumar@....com>; Pankaj Bansal
> <pankaj.bansal@....com>; Ramneek Mehresh
> <ramneek.mehresh@....com>; Ying Zhang <ying.zhang22455@....com>;
> Nipun Gupta <nipun.gupta@....com>; Priyanka Jain
> <priyanka.jain@....com>; Yogesh Narayan Gaur
> <yogeshnarayan.gaur@....com>; Sriram Dash <sriram.dash@....com>
> Subject: RE: [PATCH v4 5/6] arm64: dts: add QorIQ LX2160A SoC support
> 
> Quoting Vabhav Sharma (2018-10-14 19:58:15)
> > > > +
> > > > +   pmu {
> > > > +           compatible = "arm,cortex-a72-pmu";
> > > > +           interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> > > > +   };
> > > > +
> > > > +   psci {
> > > > +           compatible = "arm,psci-0.2";
> > > > +           method = "smc";
> > > > +   };
> > > > +
> > > > +   memory@...00000 {
> > > > +           // DRAM space - 1, size : 2 GB DRAM
> > > > +           device_type = "memory";
> > > > +           reg = <0x00000000 0x80000000 0 0x80000000>;
> > > > +   };
> > > > +
> > > > +   ddr1: memory-controller@...0000 {
> > > > +           compatible = "fsl,qoriq-memory-controller";
> > > > +           reg = <0x0 0x1080000 0x0 0x1000>;
> > > > +           interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> > > > +           little-endian;
> > > > +   };
> > > > +
> > > > +   ddr2: memory-controller@...0000 {
> > > > +           compatible = "fsl,qoriq-memory-controller";
> > > > +           reg = <0x0 0x1090000 0x0 0x1000>;
> > > > +           interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
> > > > +           little-endian;
> > > > +   };
> > > > +
> > > > +   sysclk: sysclk {
> > >
> > > Name the node a bit generic like clock-xxx.
> > There is only one clock-unit, Bootloader(U-boot) require sysclk node during
> device tree fix-up as different platform support varied platform frequency as
> per reset configuration word used.
> > Referred other ARM based platform with one clock using name as x: x
> 
> Please add a comment above this node with this information. Newcomers
> reading this DTS file won't have any idea why this node is specially named
> and a comment will help tremendously here.
Sure

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