lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 26 Oct 2018 11:29:44 -0700
From:   Tim Chen <tim.c.chen@...ux.intel.com>
To:     Waiman Long <longman9394@...il.com>,
        Jiri Kosina <jikos@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>
Cc:     Tom Lendacky <thomas.lendacky@....com>,
        Ingo Molnar <mingo@...hat.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Andrea Arcangeli <aarcange@...hat.com>,
        David Woodhouse <dwmw@...zon.co.uk>,
        Andi Kleen <ak@...ux.intel.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Casey Schaufler <casey.schaufler@...el.com>,
        Asit Mallick <asit.k.mallick@...el.com>,
        Arjan van de Ven <arjan@...ux.intel.com>,
        Jon Masters <jcm@...hat.com>, linux-kernel@...r.kernel.org,
        x86@...nel.org
Subject: Re: [Patch v3 04/13] x86/speculation: Disable STIBP when enhanced
 IBRS is in use

On 10/26/2018 11:18 AM, Tim Chen wrote:
> On 10/26/2018 10:00 AM, Waiman Long wrote:
>> On 10/17/2018 01:59 PM, Tim Chen wrote:
>>> With enhanced IBRS in use, the application running on sibling CPU will not
>>> be able to launch Spectre v2 attack to the application on current CPU.
>>> There is no need to use STIBP for this case.  Disable the STIBP code
>>> when enhanced IBRS is used.
>>>
>>> Signed-off-by: Tim Chen <tim.c.chen@...ux.intel.com>
>>> ---
>>>  arch/x86/kernel/cpu/bugs.c | 12 +++++++++++-
>>>  1 file changed, 11 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
>>> index 2fc7b4e..6ed82ea 100644
>>> --- a/arch/x86/kernel/cpu/bugs.c
>>> +++ b/arch/x86/kernel/cpu/bugs.c
>>> @@ -327,6 +327,14 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
>>>  
>>>  static bool stibp_needed(void)
>>>  {
>>> +	/*
>>> +	 * Determine if we want to leave STIBP always on.
>>> +	 * Using enhanced IBRS makes using STIBP unnecessary.
>>> +	 */
>>> +
>>> +	if (static_branch_unlikely(&spectre_v2_enhanced_ibrs))
>>> +		return false;
>>> +
>>>  	if (spectre_v2_enabled == SPECTRE_V2_NONE)
>>>  		return false;
>>>  
>>> @@ -881,7 +889,9 @@ static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr
>>>  				   ", IBPB" : "",
>>>  			boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ?
>>>  				   ", IBRS_FW" : "",
>>> -			(x86_spec_ctrl_base & SPEC_CTRL_STIBP) ?
>>> +			spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED ?
>>> +				   ", Enhanced IBRS" :
>>> +			    (x86_spec_ctrl_base & SPEC_CTRL_STIBP) ?
>>>  				   ", STIBP" : "",
>>>  			boot_cpu_has(X86_FEATURE_RSB_CTXSW) ?
>>>  				   ", RSB filling" : "",
>>
>> The "Enhanced IBRS" is one of the states of spectre_v2_enabled. So you
>> don't need to print that out one more time.
>>
> 
> This is for the query to to 
> /sys/devices/system/cpu/vulnerabilities/spectre_v2
> 
> Currently Enhanced IBRS usage is not shown and should be listed.
> 

Ah, you are correct.  It is shown in spectre_v2 string.  Will remove
the extra Enhanced IBRS string.

Tim

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ