lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 6 Nov 2018 07:58:15 -0600
From:   Rob Herring <robh@...nel.org>
To:     Sven Van Asbroeck <thesven73@...il.com>
Cc:     Sven Van Asbroeck <svendev@...x.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Lee Jones <lee.jones@...aro.org>,
        Mark Rutland <mark.rutland@....com>,
        Andreas Färber <afaerber@...e.de>,
        Thierry Reding <treding@...dia.com>,
        David Lechner <david@...hnology.com>,
        Noralf Trønnes <noralf@...nnes.org>,
        Johan Hovold <johan@...nel.org>,
        Michal Simek <monstr@...str.eu>,
        Michal Vokáč <michal.vokac@...ft.com>,
        Arnd Bergmann <arnd@...db.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        John Garry <john.garry@...wei.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Robin Murphy <robin.murphy@....com>,
        Paul Gortmaker <paul.gortmaker@...driver.com>,
        Sebastien Bourdelin <sebastien.bourdelin@...oirfairelinux.com>,
        Icenowy Zheng <icenowy@...c.io>,
        Stuart Yoder <stuyoder@...il.com>,
        Maxime Ripard <maxime.ripard@...tlin.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        devicetree@...r.kernel.org
Subject: Re: [PATCH anybus v3 1/6] misc: support the Arcx anybus bridge

On Mon, Nov 5, 2018 at 3:50 PM Sven Van Asbroeck <thesven73@...il.com> wrote:
>
> On Mon, Nov 5, 2018 at 4:20 PM Rob Herring <robh@...nel.org> wrote:
> >
> > bridge vs. host are confusing me as those are often the same thing. But
> > here bridge is just some auxilliary controls for the bus and the host is
> > the actual bus with devices? I'm not sure why you split this into 2 DT
> > nodes? How many devices are connected to the host processor (i.MX) bus?
> >
>
> The anybus can only have a single client card (device) on the bus. I
> know, we can criticise the name, but that's how HMS Industrial
> Networks designed it.
>
> The anybus-bridge is how we (at arcx / Archronix) physically connect
> anybus slots to the iMX. It is a CPLD chip connected to the i.MX WEIM
> bus on the SoC side. On the other side of the CPLD, there are two
> anybus slots. Each slot may hold an anybus card (profinet, flnet,
> cc-link, ...)
>
> The anybuss-host implements the anybus specification in a
> platform-independent way. Some other company could attach anybus slots
> to their CPU through a completely different bus, or spi, and they
> could still attach the anybuss-host driver onto it. All the driver
> needs is a regmap providing access to the anybus slot memory, an
> interrupt, and a reset controller.

It doesn't really sound like the host should be in DT. The bridge
should register itself as an anybus provider and that should in turn
enable the anybus host protocol.

Rob

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ