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Message-ID: <20181108124632.fd52533ws7l7j2r2@verge.net.au>
Date: Thu, 8 Nov 2018 13:46:32 +0100
From: Simon Horman <horms@...ge.net.au>
To: Fabrizio Castro <fabrizio.castro@...renesas.com>
Cc: Wolfgang Grandegger <wg@...ndegger.com>,
Marc Kleine-Budde <mkl@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
"David S. Miller" <davem@...emloft.net>,
Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
"linux-can@...r.kernel.org" <linux-can@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH v2 2/3] dt-bindings: can: rcar_can: Add r8a774a1 support
On Thu, Nov 08, 2018 at 11:25:23AM +0000, Fabrizio Castro wrote:
> Dear All,
>
> Who is the best person to take this patch?
I believe this one is for Marc.
> Thanks,
> Fab
>
> > From: Fabrizio Castro <fabrizio.castro@...renesas.com>
> > Sent: 10 September 2018 11:43
> > Subject: [PATCH v2 2/3] dt-bindings: can: rcar_can: Add r8a774a1 support
> >
> > Document RZ/G2M (r8a774a1) SoC specific bindings.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro@...renesas.com>
> > Signed-off-by: Chris Paterson <Chris.Paterson2@...esas.com>
> > Reviewed-by: Biju Das <biju.das@...renesas.com>
> > ---
> > v1->v2:
> > * dropped "renesas,rzg-gen2-can" and fixed "clocks" property description
> > as per Geert's comments.
> >
> > This patch applies on top of next-20180910.
> >
> > Documentation/devicetree/bindings/net/can/rcar_can.txt | 18 +++++++++++++-----
> > 1 file changed, 13 insertions(+), 5 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt
> > index 94a7f33..f3b160c 100644
> > --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt
> > +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
> > @@ -4,6 +4,7 @@ Renesas R-Car CAN controller Device Tree Bindings
> > Required properties:
> > - compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
> > "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
> > + "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
> > "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
> > "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
> > "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
> > @@ -16,15 +17,21 @@ Required properties:
> > "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
> > "renesas,rcar-gen2-can" for a generic R-Car Gen2 or RZ/G1
> > compatible device.
> > - "renesas,rcar-gen3-can" for a generic R-Car Gen3 compatible device.
> > + "renesas,rcar-gen3-can" for a generic R-Car Gen3 or RZ/G2
> > + compatible device.
> > When compatible with the generic version, nodes must list the
> > SoC-specific version corresponding to the platform first
> > followed by the generic version.
> >
> > - reg: physical base address and size of the R-Car CAN register map.
> > - interrupts: interrupt specifier for the sole interrupt.
> > -- clocks: phandles and clock specifiers for 3 CAN clock inputs.
> > -- clock-names: 3 clock input name strings: "clkp1", "clkp2", "can_clk".
> > +- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2
> > + devices.
> > + phandles and clock specifiers for 3 CAN clock inputs for every other
> > + SoC.
> > +- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk".
> > + 3 clock input name strings for every other SoC: "clkp1", "clkp2",
> > + "can_clk".
> > - pinctrl-0: pin control group to be used for this controller.
> > - pinctrl-names: must be "default".
> >
> > @@ -41,8 +48,9 @@ using the below properties:
> > Optional properties:
> > - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
> > <0x0> (default) : Peripheral clock (clkp1)
> > - <0x1> : Peripheral clock (clkp2)
> > - <0x3> : Externally input clock
> > + <0x1> : Peripheral clock (clkp2) (not supported by
> > + RZ/G2 devices)
> > + <0x3> : External input clock
> >
> > Example
> > -------
> > --
> > 2.7.4
>
>
>
>
> Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
>
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