[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAAhSdy20zU=GeaePQfYW_FKH-wmsYgvK3-6ouc3S8QpwWH-Z+w@mail.gmail.com>
Date: Mon, 12 Nov 2018 18:03:09 +0530
From: Anup Patel <anup@...infault.org>
To: Christoph Hellwig <hch@...radead.org>
Cc: Palmer Dabbelt <palmer@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Atish Patra <atish.patra@....com>,
linux-riscv@...ts.infradead.org,
"linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/4] irqchip: sifive-plic: More flexible plic_irq_toggle()
On Fri, Nov 9, 2018 at 2:13 PM Christoph Hellwig <hch@...radead.org> wrote:
>
> > -
> > struct plic_handler {
> > bool present;
> > - int ctxid;
> > void __iomem *hart_base;
> > raw_spinlock_t enable_lock;
> > void __iomem *enable_base;
> > };
> > -static DEFINE_PER_CPU(struct plic_handler, plic_handlers);
>
> This does not match the changelog at all.
My bad. I should have put this change into separate patch.
I will refactor this patch.
Regards,
Anup
Powered by blists - more mailing lists