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Message-ID: <3E5A0FA7E9CA944F9D5414FEC6C71220985A6664@ORSMSX105.amr.corp.intel.com>
Date:   Tue, 13 Nov 2018 21:49:40 +0000
From:   "Yu, Fenghua" <fenghua.yu@...el.com>
To:     "Moger, Babu" <Babu.Moger@....com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "bp@...en8.de" <bp@...en8.de>, "corbet@....net" <corbet@....net>,
        "Chatre, Reinette" <reinette.chatre@...el.com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "akpm@...ux-foundation.org" <akpm@...ux-foundation.org>
CC:     "hpa@...or.com" <hpa@...or.com>, "x86@...nel.org" <x86@...nel.org>,
        "mchehab+samsung@...nel.org" <mchehab+samsung@...nel.org>,
        "arnd@...db.de" <arnd@...db.de>,
        "kstewart@...uxfoundation.org" <kstewart@...uxfoundation.org>,
        "pombredanne@...b.com" <pombredanne@...b.com>,
        "rafael@...nel.org" <rafael@...nel.org>,
        "kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
        "Luck, Tony" <tony.luck@...el.com>,
        "qianyue.zj@...baba-inc.com" <qianyue.zj@...baba-inc.com>,
        "Shen, Xiaochen" <xiaochen.shen@...el.com>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "Singh, Brijesh" <brijesh.singh@....com>,
        "Hurwitz, Sherry" <sherry.hurwitz@....com>,
        "dwmw2@...radead.org" <dwmw2@...radead.org>,
        "Lendacky, Thomas" <Thomas.Lendacky@....com>,
        "luto@...nel.org" <luto@...nel.org>,
        "joro@...tes.org" <joro@...tes.org>,
        "jannh@...gle.com" <jannh@...gle.com>,
        "vkuznets@...hat.com" <vkuznets@...hat.com>,
        "rian@...m.mit.edu" <rian@...m.mit.edu>,
        "jpoimboe@...hat.com" <jpoimboe@...hat.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
        "Yu, Fenghua" <fenghua.yu@...el.com>
Subject: RE: [PATCH v7 11/13] arch/x86: Introduce QOS feature for AMD

> From: Moger, Babu [mailto:Babu.Moger@....com]
> Subject: [PATCH v7 11/13] arch/x86: Introduce QOS feature for AMD
> The specification for this feature is available at
> https://developer.amd.com/wp-content/resources/56375.pdf

> +bool cbm_validate_amd(char *buf, u32 *data, struct rdt_resource *r) {
> +	if (val > r->default_ctrl) {
> +		rdt_last_cmd_puts("mask out of range\n");
> +		return false;
> +	}

If val is zero, then this closid cannot allocate any cache line.

I'm wondering: does that mean the tasks running with this closid directly access memory without cache? Is there any usage for this situation?

Thanks.

-Fenghua

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