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Message-ID: <20181115151442.GK9600@krava>
Date:   Thu, 15 Nov 2018 16:14:42 +0100
From:   Jiri Olsa <jolsa@...hat.com>
To:     "Liang, Kan" <kan.liang@...ux.intel.com>
Cc:     acme@...nel.org, mingo@...hat.com, peterz@...radead.org,
        linux-kernel@...r.kernel.org, namhyung@...nel.org,
        ak@...ux.intel.com
Subject: Re: [PATCH 2/2] perf vendor events: Add JSON metrics for Cascadelake
 server

On Thu, Nov 15, 2018 at 08:33:27AM -0500, Liang, Kan wrote:
> 
> 
> On 11/15/2018 8:21 AM, Jiri Olsa wrote:
> > On Wed, Nov 14, 2018 at 01:24:16PM -0800, kan.liang@...ux.intel.com wrote:
> > > From: Kan Liang <kan.liang@...ux.intel.com>
> > > 
> > > Add JSON metrics (based on event list v1) for Cascadelake server
> > 
> > hum mail server probably crippled the email so it won't apply:
> > 
> > patching file pmu-events/arch/x86/cascadelakex/cache.json
> > patching file pmu-events/arch/x86/cascadelakex/clx-metrics.json
> > patching file pmu-events/arch/x86/cascadelakex/floating-point.json
> > patching file pmu-events/arch/x86/cascadelakex/frontend.json
> > patching file pmu-events/arch/x86/cascadelakex/memory.json
> > patching file pmu-events/arch/x86/cascadelakex/other.json
> > patching file pmu-events/arch/x86/cascadelakex/pipeline.json
> > patch: **** malformed patch at line 29879:  ow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
> > 
> > I've similar error before and it was because of the 998 chars size
> > limit for line.. I guess you could either post it as attachment or
> > change the transfer encoding
> > 
> 
> The patch is attached. Can it be applied?

yep, that one works

thanks,
jirka

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