lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <154283618199.88331.10217252750356423959@swboyd.mtv.corp.google.com>
Date:   Wed, 21 Nov 2018 13:36:21 -0800
From:   Stephen Boyd <swboyd@...omium.org>
To:     Lina Iyer <ilina@...eaurora.org>, evgreen@...omium.org,
        marc.zyngier@....com
Cc:     linux-kernel@...r.kernel.org, rplsssn@...eaurora.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        thierry.reding@...il.com, Lina Iyer <ilina@...eaurora.org>
Subject: Re: [RFC v3 2/3] dt-bindings: sdm845-pinctrl: add wakeup interrupt parent
 for GPIO

Quoting Lina Iyer (2018-11-20 16:06:47)
> SDM845 SoC has an always-on interrupt controller (PDC) with select GPIO
> routed to the PDC as interrupts that can be used to wake the system up
> from deep low power modes and suspend.
> 
> Signed-off-by: Lina Iyer <ilina@...eaurora.org>
> ---
>  .../bindings/pinctrl/qcom,sdm845-pinctrl.txt  | 31 ++++++++++++++++++-
>  1 file changed, 30 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
> index 665aadb5ea28..bedfa0b57fa6 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
> @@ -29,6 +29,17 @@ SDM845 platform.
>         Definition: must be 2. Specifying the pin number and flags, as defined
>                     in <dt-bindings/interrupt-controller/irq.h>
>  
> +- wakeup-parent:
> +       Usage: optional
> +       Value type: <phandle>
> +       Definition: A phandle to the wakeup interrupt controller for the SoC.
> +
> +- wakeup-irq:

This shouldn't be needed. TLMM driver can probe for the possibility of
wakeup capable irqs from irq allocation step. The only place we should
need to know what TLMM pins map to what PDC lines is in the PDC driver.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ