linux-kernel - RE: [PATCH v2] x86: modernize sync

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Message-ID: <92f590595593498eaa1f91a17875126f@AcuMS.aculab.com>
Date:   Wed, 21 Nov 2018 11:55:04 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Jan Beulich' <JBeulich@...e.com>, "mingo@...e.hu" <mingo@...e.hu>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "hpa@...or.com" <hpa@...or.com>
CC:     Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Juergen Gross <jgross@...e.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2] x86: modernize sync_bitops.h

From: Jan Beulich
> Sent: 21 November 2018 10:11
> 
> Add missing insn suffixes and use rmwcc.h just like was (more or less)
> recently done for bitops.h as well.

Why? bts (etc) on memory don't really have an 'operand size'.
IIRC the suffix determines the width of the %cx register that selects the bit number.
I'd have to look up what the "Ir" constraint means.

IIRC the i386 book just said that the cpu might (aka will) read/write 4 bytes
surrounding the required byte.
More recent books say it does an aligned 4 byte read/write.

	David

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