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Message-ID: <20181126101116.32819842@ipc1.ka-ro>
Date: Mon, 26 Nov 2018 10:11:16 +0100
From: Lothar Waßmann <LW@...O-electronics.de>
To: Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>
Cc: Vokáč Michal <Michal.Vokac@...ft.com>,
Thierry Reding <thierry.reding@...il.com>,
Mark Rutland <mark.rutland@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-pwm@...r.kernel.org" <linux-pwm@...r.kernel.org>,
Lukasz Majewski <l.majewski@...ess.pl>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
Fabio Estevam <fabio.estevam@....com>,
Linus Walleij <linus.walleij@...aro.org>,
viresh kumar <viresh.kumar@...aro.org>
Subject: Re: [RCF PATCH,v2,2/2] pwm: imx: Configure output to GPIO in
disabled state
Uwe Kleine-König <u.kleine-koenig@...gutronix.de> wrote:
> Hello Michal,
>
> On Fri, Nov 23, 2018 at 03:15:11PM +0000, Vokáč Michal wrote:
> > On 22.11.2018 20:03, Uwe Kleine-König wrote:
> > > On Thu, Nov 22, 2018 at 04:46:39PM +0000, Vokáč Michal wrote:
> > >> On 22.11.2018 17:23, Uwe Kleine-König wrote:
> > >>> So I'd expect this to really work on i.MX6 but not the earlier SoCs
> > >>> without a gpio specifier.
> > >>
> > >> Maybe you would expect it to work but I already tested and measured
> > >> that weeks ago ;) It did not work.
> > >
> > > Which pin/gpio do we talk about? Which i.MX6 variant did you test this
> > > on? (Assuming i.MX6D or i.MX6Q and PAD_DISP0_DATA09, did you try setting
> > >
> > > IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA09 (0x020E0194) = 0x00000005
> > > IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA09 (0x020E04A8) = 0x0000b080
> > >
> > > and then play with GPIO 4.30 direction and output value?)
> >
> > My test setup is as follows:
> > - SoC is i.MX6DL or i.MX6S - I have three board variants in total.
> > - Pin used for PWM/GPIO is PAD_GPIO9.
> > - The pin is not connected to any circuit. Just a test point.
> > - pinctrl setup in DT:
> > - for "pwm":
> > - fsl,pins = <MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8>
> > - IOMUXC_SW_MUX_CTL_PAD_GPIO09 = 0x00000004
> > - IOMUXC_SW_PAD_CTL_PAD_GPIO09 = 0x00000008
> >
> > - for "gpio":
> > - fsl,pins = <MX6QDL_PAD_GPIO_9__GPIO1_IO09 0xb000>
> > - IOMUXC_SW_MUX_CTL_PAD_GPIO09 = 0x00000005
> > - IOMUXC_SW_PAD_CTL_PAD_GPIO09 = 0x0000b000
>
> FTR: I suggested 0x0000b080 here, but 0x0000b000 is just fine.
>
> > Test scenario:
> >
> > - In bootloader configure the pin as GPIO output, set it LOW (0V).
> > I set it LOW to start in the oposite state than I want to end up in.
> > - Boot Linux
> > - Use sysfs to configure the PWM to produce some signal.
> > - In the PWM driver select the "pwm" pinctrl state.
> > - Measure the output - expected waveform on the scope.
> > - Use sysfs to stop the PWM "echo 0 > /sys/class/pwm/pwmchip0/pwm0/enable°
> > - In the PWM driver select the "gpio" pinctrl state.
> > - Then in the PWM driver:
> >
> > a) non-working variant
> > - Do not request the GPIO - so do not touch its pad control reg.
> > It is set as output from the bootloader, data register = 0.
> > - Measure voltage on the output
> > - against GND = 0V
> > - against VCC = 0V
> > - Measure resistance against VCC: Hi-Z
> >
> > The pin is in Hi-Z mode. That is fine but that does not satisfy any
> > logic level.
> >
> > b) working variant
> > - Request the GPIO, configure it as input.
> > - Measure voltage on the output
> > - against GND = VCC (3.3V)
> > - against VCC = 0V
> > - Measure resistance against VCC = 91.1kOhm
> >
> > The pull-up is active.
>
> Thanks for your detailed test. So DSE = 0 doesn't work as I (and I think
> Lothar) expected.
>
> @Lothar: if Michal did something different than you expected, please
> tell us with a few more details.
>
No, Michal's findings are in sync with what I checked here.
Lothar Waßmann
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