linux-kernel - Re: [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support for Arasan NAND Flash Controller

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Message-ID: <20181217174114.24196d17@xps13>
Date:   Mon, 17 Dec 2018 17:41:14 +0100
From:   Miquel Raynal <miquel.raynal@...tlin.com>
To:     Naga Sureshkumar Relli <nagasure@...inx.com>
Cc:     Boris Brezillon <boris.brezillon@...tlin.com>,
        "robh@...nel.org" <robh@...nel.org>,
        "richard@....at" <richard@....at>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "marek.vasut@...il.com" <marek.vasut@...il.com>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
        "nagasuresh12@...il.com" <nagasuresh12@...il.com>,
        Michal Simek <michals@...inx.com>,
        "computersforpeace@...il.com" <computersforpeace@...il.com>,
        "dwmw2@...radead.org" <dwmw2@...radead.org>
Subject: Re: [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support for
 Arasan NAND Flash Controller

Hi Naga,

[...]

> Inserted biterror @ 48/7
> Successfully corrected 25 bit errors per subpage
> Inserted biterror @ 50/7
> ECC failure, invalid data despite read success
> root@...inx-zc1751-dc2-2018_1:~#
> 
> But even in this case also, driver is saying ECC failure but read success.
> That means controller is able to detect errors on read page up to 24 bit only.
> After that there is no way to say to the upper layers that the page is bad because of the limitation in the controller.

This is more than a "limitation", the design is broken. I am not sure
how to support such controller, and I am not sure if we even want to.

> Could you please suggest any alternative to report the errors in that case?

Shall we support the controller without the hw ECC engine? Boris, any
thoughts?


Thanks,
Miquèl