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Message-ID: <5c3b1ca3-d720-1493-d3d5-463869931f46@linux.intel.com>
Date: Wed, 19 Dec 2018 07:23:12 +0800
From: "Li, Aubrey" <aubrey.li@...ux.intel.com>
To: Dave Hansen <dave.hansen@...el.com>,
Thomas Gleixner <tglx@...utronix.de>
Cc: Aubrey Li <aubrey.li@...el.com>, mingo@...hat.com,
peterz@...radead.org, hpa@...or.com, ak@...ux.intel.com,
tim.c.chen@...ux.intel.com, arjan@...ux.intel.com,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 1/3] x86/fpu: track AVX-512 usage of tasks
On 2018/12/19 1:14, Dave Hansen wrote:
> On 12/18/18 7:32 AM, Thomas Gleixner wrote:
>> What exactly prevents a 32bit kernel from having the AVX512 feature bit
>> set? And if it cannot be set on 32bit, then why are you compiling that code
>> in at all?
>
> There are three different AVX-512 states (and three bits) which Aubrey's
> patch checks. All three have different rules. Here's a summary along
> with some relevant SDM quotes from Vol1-13.6.
>
> Opmask state: All opmask registers can be set in 32-bit mode.
> ZMM_Hi256 state: "An execution of XRSTOR or XRSTORS outside 64-bit mode
> does not update ZMM8_H–ZMM15_H." This implies that
> ZMM0_H-ZMM7_H *are* updated in 32-bit mode.
> Hi16_ZMM state: "Outside 64-bit mode, Hi16_ZMM state is always in its
> initial configuration."
>
> All of Hi16_ZMM and *part* of ZMM_Hi256 can not be practically used in
> 32-bit mode. But, even using part of ZMM_Hi256 means the xfeature bit
> will be set.
>
> So, 2/3 of the features can be used in 32-bit mode. Nothing that I can
> find _prevents_ those features from being used in 32-bit mode.
>
> Aubrey, do you have information to the contrary?
>
Thanks Dave for the summary, similar info I have from SDM, so yes, 32bit
kernel can have xfeature bits set.
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