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Message-ID: <20181220204359.GA30122@bogus>
Date: Thu, 20 Dec 2018 14:43:59 -0600
From: Rob Herring <robh@...nel.org>
To: Weiyi Lu <weiyi.lu@...iatek.com>
Cc: Matthias Brugger <matthias.bgg@...il.com>,
Stephen Boyd <sboyd@...eaurora.org>,
James Liao <jamesjj.liao@...iatek.com>,
Fan Chen <fan.chen@...iatek.com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org, linux-clk@...r.kernel.org,
srv_heupstream@...iatek.com, Weiyi Lu <weiyi.lu@...iatek.com>
Subject: Re: [resend PATCH v1 1/2] dt-bindings: clock: add clock for MT2712
On Fri, 14 Dec 2018 10:04:16 +0800, Weiyi Lu wrote:
> Add new clock according to 3rd ECO design change.
> It's the parent clock of audio clock mux.
>
> Signed-off-by: Weiyi Lu <weiyi.lu@...iatek.com>
> ---
> include/dt-bindings/clock/mt2712-clk.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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